diff options
| author | Hariprasad Shenai <hariprasad@chelsio.com> | 2014-09-01 14:24:57 (GMT) |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2014-09-02 06:00:41 (GMT) |
| commit | 9bb59b96ae88ee9dc035d5cc9818b02b12208904 (patch) | |
| tree | 4e6795065995b7e9e126c0133c8e09d35b5a7eca /drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c | |
| parent | 63a92fe6f7e40069086be21bf9fbcfbe8d001345 (diff) | |
| download | linux-9bb59b96ae88ee9dc035d5cc9818b02b12208904.tar.xz | |
cxgb4: Fix T5 adapter accessing T4 adapter registers
Fixes few register access for both T4 and T5.
PCIE_CORE_UTL_SYSTEM_BUS_AGENT_STATUS & PCIE_CORE_UTL_PCI_EXPRESS_PORT_STATUS
is T4 only register don't let T5 access them. For T5 MA_PARITY_ERROR_STATUS2
is additionally read. MPS_TRC_RSS_CONTROL is T4 only register, for T5 use
MPS_T5_TRC_RSS_CONTROL.
Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c')
| -rw-r--r-- | drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c index 18fb9c6..cf387ae 100644 --- a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c +++ b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c @@ -1253,7 +1253,9 @@ freeout: t4_free_sge_resources(adap); goto freeout; } - t4_write_reg(adap, MPS_TRC_RSS_CONTROL, + t4_write_reg(adap, is_t4(adap->params.chip) ? + MPS_TRC_RSS_CONTROL : + MPS_T5_TRC_RSS_CONTROL, RSSCONTROL(netdev2pinfo(adap->port[0])->tx_chan) | QUEUENUMBER(s->ethrxq[0].rspq.abs_id)); return 0; |