diff options
| author | Rajkumar Manoharan <rmanohar@qca.qualcomm.com> | 2012-09-24 08:34:24 (GMT) |
|---|---|---|
| committer | John W. Linville <linville@tuxdriver.com> | 2012-09-25 19:57:44 (GMT) |
| commit | a50d1fd4525162732b45db7a372e868933746a4e (patch) | |
| tree | d8dc706472571c7b77d469aea2ac18a0e7ad6749 /drivers/net/wireless/ath/ath9k/ar9003_mci.c | |
| parent | 55d2e9da744ba11eae900b4bfc2da72eace3c1e1 (diff) | |
| download | linux-a50d1fd4525162732b45db7a372e868933746a4e.tar.xz | |
ath9k_hw: fix BT sleep state on chip wakeup
Whenever both WLAN and BT in/out sleep mode, sometimes WLAN
is not able to take back the shared LNA control after resumes
from sleep mode. The idea is that for WLAN to check if BT owns
LNA control and BT is in sleep mode when WLAN just resumes from
sleep mode. If the condition is true, do a BTCOEX_RC_WARM_RESET
for WLAN to take back the control of shared LNA.
Now the issue is the BT sleep value read from MCI register is
overlooked by assigning u32 into u8. Hence the above condition never
be met so that WLAN used to report beacon losses and frequent
connection drops.
Signed-off-by: Rajkumar Manoharan <rmanohar@qca.qualcomm.com>
Tested-by: Paul Stewart <pstew@chromium.org>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/ath/ath9k/ar9003_mci.c')
| -rw-r--r-- | drivers/net/wireless/ath/ath9k/ar9003_mci.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_mci.c b/drivers/net/wireless/ath/ath9k/ar9003_mci.c index 8d8df4b..8dbb60b 100644 --- a/drivers/net/wireless/ath/ath9k/ar9003_mci.c +++ b/drivers/net/wireless/ath/ath9k/ar9003_mci.c @@ -1289,7 +1289,7 @@ void ar9003_mci_set_power_awake(struct ath_hw *ah) } REG_WRITE(ah, AR_DIAG_SW, (diag_sw | BIT(27) | BIT(19) | BIT(18))); lna_ctrl = REG_READ(ah, AR_OBS_BUS_CTRL) & 0x3; - bt_sleep = REG_READ(ah, AR_MCI_RX_STATUS) & AR_MCI_RX_REMOTE_SLEEP; + bt_sleep = MS(REG_READ(ah, AR_MCI_RX_STATUS), AR_MCI_RX_REMOTE_SLEEP); REG_WRITE(ah, AR_BTCOEX_CTRL2, btcoex_ctrl2); REG_WRITE(ah, AR_DIAG_SW, diag_sw); |