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authorBjorn Helgaas <bhelgaas@google.com>2013-12-18 21:04:20 (GMT)
committerBjorn Helgaas <bhelgaas@google.com>2013-12-18 21:04:20 (GMT)
commit765147f85a79aba1ba2a45b42eee00e63f783bc9 (patch)
treefe207735f8041044fef33020093cfe75e69bcbfd /drivers/pci
parent1c898ba1ca949d695e566a556a9f7326f37265e5 (diff)
parent17bd86c69cea4a8364e2ef8a49947dd9d5e26f13 (diff)
downloadlinux-765147f85a79aba1ba2a45b42eee00e63f783bc9.tar.xz
Merge branch 'pci/host-tegra' into next
* pci/host-tegra: PCI: Disable Gen2 for Tegra20 and Tegra30
Diffstat (limited to 'drivers/pci')
-rw-r--r--drivers/pci/host/pci-tegra.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/pci/host/pci-tegra.c b/drivers/pci/host/pci-tegra.c
index 0afbbbc..b8ba2f7 100644
--- a/drivers/pci/host/pci-tegra.c
+++ b/drivers/pci/host/pci-tegra.c
@@ -805,7 +805,7 @@ static int tegra_pcie_enable_controller(struct tegra_pcie *pcie)
afi_writel(pcie, value, AFI_PCIE_CONFIG);
value = afi_readl(pcie, AFI_FUSE);
- value &= ~AFI_FUSE_PCIE_T0_GEN2_DIS;
+ value |= AFI_FUSE_PCIE_T0_GEN2_DIS;
afi_writel(pcie, value, AFI_FUSE);
/* initialize internal PHY, enable up to 16 PCIE lanes */