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authorThierry Reding <treding@nvidia.com>2014-06-19 11:37:08 (GMT)
committerThierry Reding <treding@nvidia.com>2014-07-11 12:41:06 (GMT)
commitdc0a3938668706f3a63cde4ceb431e9189fb2a0a (patch)
tree2736866f7584a5633d9f0c55205838f08fcb01e3 /drivers/pinctrl/Kconfig
parentbe306dac534008f7f47839fbbe241c1608c25ce1 (diff)
downloadlinux-dc0a3938668706f3a63cde4ceb431e9189fb2a0a.tar.xz
pinctrl: Add NVIDIA Tegra XUSB pad controller support
The XUSB pad controller found on NVIDIA Tegra SoCs provides several pads that lanes can be assigned to in order to support a variety of interface options: USB 2.0, USB 3.0, PCIe and SATA. In addition to the pin controller used to assign lanes to pads two PHYs are exposed to allow the bricks for PCIe and SATA to be powered up and down by PCIe and SATA drivers. Tested-by: Mikko Perttunen <mperttunen@nvidia.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/pinctrl/Kconfig')
-rw-r--r--drivers/pinctrl/Kconfig6
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
index 0042ccb..0fa42be 100644
--- a/drivers/pinctrl/Kconfig
+++ b/drivers/pinctrl/Kconfig
@@ -328,6 +328,12 @@ config PINCTRL_TEGRA124
bool
select PINCTRL_TEGRA
+config PINCTRL_TEGRA_XUSB
+ def_bool y if ARCH_TEGRA
+ select GENERIC_PHY
+ select PINCONF
+ select PINMUX
+
config PINCTRL_TZ1090
bool "Toumaz Xenif TZ1090 pin control driver"
depends on SOC_TZ1090