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| author | Mika Westerberg <mika.westerberg@linux.intel.com> | 2014-10-24 12:16:52 (GMT) |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2014-10-29 09:35:20 (GMT) |
| commit | 5fae8b86fdf083bc43bf759abad6661be9d0b9ac (patch) | |
| tree | 8463493f827c960fac046251f684c94e0fd27b9e /drivers/pinctrl/intel/Kconfig | |
| parent | cfb24f6ebd38137ebf072cb5629fdf6df51e49c1 (diff) | |
| download | linux-5fae8b86fdf083bc43bf759abad6661be9d0b9ac.tar.xz | |
pinctrl: Move Intel Baytrail pinctrl driver under intel directory
We are going to have more pinctrl drivers for Intel hardware so separate
all our pin controller drivers to own directory.
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/intel/Kconfig')
| -rw-r--r-- | drivers/pinctrl/intel/Kconfig | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/drivers/pinctrl/intel/Kconfig b/drivers/pinctrl/intel/Kconfig new file mode 100644 index 0000000..957c903 --- /dev/null +++ b/drivers/pinctrl/intel/Kconfig @@ -0,0 +1,15 @@ +# +# Intel pin control drivers +# + +config PINCTRL_BAYTRAIL + bool "Intel Baytrail GPIO pin control" + depends on GPIOLIB && ACPI + select GPIOLIB_IRQCHIP + help + driver for memory mapped GPIO functionality on Intel Baytrail + platforms. Supports 3 banks with 102, 28 and 44 gpios. + Most pins are usually muxed to some other functionality by firmware, + so only a small amount is available for gpio use. + + Requires ACPI device enumeration code to set up a platform device. |