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| author | Qipeng Zha <qipeng.zha@intel.com> | 2015-11-25 17:09:51 (GMT) |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2015-12-10 22:01:41 (GMT) |
| commit | 618a919b4c5150408c26f8b4527851f7065f841c (patch) | |
| tree | 7b958a9ea7d915bb481e2ee9e3d2709de899c59a /drivers/pinctrl/intel/pinctrl-intel.h | |
| parent | 46435d4c35336e169a198ef5cd51f9427e78ed62 (diff) | |
| download | linux-618a919b4c5150408c26f8b4527851f7065f841c.tar.xz | |
pinctrl: intel: fix bug of register offset calculation
The group size for registers PADCFGLOCK, HOSTSW_OWN, GPI_IS,
GPI_IE, are not 24 for Broxton, Add a parameter to allow
different platform to set correct value.
Signed-off-by: Qi Zheng <qi.zheng@intel.com>
Signed-off-by: Qipeng Zha <qipeng.zha@intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/intel/pinctrl-intel.h')
| -rw-r--r-- | drivers/pinctrl/intel/pinctrl-intel.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/pinctrl/intel/pinctrl-intel.h b/drivers/pinctrl/intel/pinctrl-intel.h index 4ec8b57..b602157 100644 --- a/drivers/pinctrl/intel/pinctrl-intel.h +++ b/drivers/pinctrl/intel/pinctrl-intel.h @@ -55,6 +55,8 @@ struct intel_function { * ACPI). * @ie_offset: Register offset of GPI_IE from @regs. * @pin_base: Starting pin of pins in this community + * @gpp_size: Maximum number of pads in each group, such as PADCFGLOCK, + * HOSTSW_OWN, GPI_IS, GPI_IE, etc. * @npins: Number of pins in this community * @regs: Community specific common registers (reserved for core driver) * @pad_regs: Community specific pad registers (reserved for core driver) @@ -68,6 +70,7 @@ struct intel_community { unsigned hostown_offset; unsigned ie_offset; unsigned pin_base; + unsigned gpp_size; size_t npins; void __iomem *regs; void __iomem *pad_regs; |