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authorHans de Goede <hdegoede@redhat.com>2015-09-19 21:56:44 (GMT)
committerLinus Walleij <linus.walleij@linaro.org>2015-10-02 11:06:01 (GMT)
commitd50a9e1b6de45db883f594cea0ecd1379fd3f669 (patch)
tree6be05fe19acc66fda632b1ee14149a6223ca15dd /drivers/pinctrl/sunxi
parent1f93e4a96c9109378204c147b3eec0d0e8100fde (diff)
downloadlinux-d50a9e1b6de45db883f594cea0ecd1379fd3f669.tar.xz
pinctrl: sun5i: Fix a10s pwm1 pinctrl mapping
The comment for PG14 mux setting 3 already correctly states that this muxes PG13 to pwm1, but the text ascociated with it said uart3, fix this. Note that we use "pwm" rather then "pwm1" to be consistent with pwm0 where the mux setting is also simply called "pwm" and to be consistent with sun4i/sun7i which do the same. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/sunxi')
-rw-r--r--drivers/pinctrl/sunxi/pinctrl-sun5i-a10s.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun5i-a10s.c b/drivers/pinctrl/sunxi/pinctrl-sun5i-a10s.c
index 6367661..f9a3f8f 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun5i-a10s.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun5i-a10s.c
@@ -653,7 +653,7 @@ static const struct sunxi_desc_pin sun5i_a10s_pins[] = {
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "spi1"), /* CS1 */
- SUNXI_FUNCTION(0x3, "uart3"), /* PWM1 */
+ SUNXI_FUNCTION(0x3, "pwm"), /* PWM1 */
SUNXI_FUNCTION(0x5, "uart2"), /* CTS */
SUNXI_FUNCTION_IRQ(0x6, 13)), /* EINT13 */
};