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author | Masahiro Yamada <yamada.masahiro@socionext.com> | 2015-05-20 08:42:30 (GMT) |
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committer | Linus Walleij <linus.walleij@linaro.org> | 2015-06-01 12:59:24 (GMT) |
commit | 4f652cea020aac42972cb7c9788b470ed45aa228 (patch) | |
tree | 74e8484408b86df08f99f8d73cb25aa827006b50 /drivers/pinctrl | |
parent | 8480c2e7b0484b8ec741bbb908455fce748f9798 (diff) | |
download | linux-4f652cea020aac42972cb7c9788b470ed45aa228.tar.xz |
pinctrl: zynq: fix DEFINE_ZYNQ_PINMUX_FUNCTION_MUX macro
The offset to the mux register is missing.
Fixes: add958cee967 "pinctrl: Add driver for Zynq"
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Sören Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl')
-rw-r--r-- | drivers/pinctrl/pinctrl-zynq.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/pinctrl/pinctrl-zynq.c b/drivers/pinctrl/pinctrl-zynq.c index d66f64c..e65abaa 100644 --- a/drivers/pinctrl/pinctrl-zynq.c +++ b/drivers/pinctrl/pinctrl-zynq.c @@ -768,12 +768,13 @@ static const char * const gpio0_groups[] = {"gpio0_0_grp", .mux_val = mval, \ } -#define DEFINE_ZYNQ_PINMUX_FUNCTION_MUX(fname, mval, mux, mask, shift) \ +#define DEFINE_ZYNQ_PINMUX_FUNCTION_MUX(fname, mval, offset, mask, shift)\ [ZYNQ_PMUX_##fname] = { \ .name = #fname, \ .groups = fname##_groups, \ .ngroups = ARRAY_SIZE(fname##_groups), \ .mux_val = mval, \ + .mux = offset, \ .mux_mask = mask, \ .mux_shift = shift, \ } |