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authorJacek Danecki <Jacek.Danecki@intel.com>2011-02-23 08:08:58 (GMT)
committerDan Williams <dan.j.williams@intel.com>2011-07-03 10:55:27 (GMT)
commitd9def184b39b966b7496dfbfad126808d3cd701b (patch)
treeba846330e7f33dc8de24c236760a825e30ff75c1 /drivers/scsi/isci/core/scic_sds_phy.c
parent246214667f275a952b05a42b3c45a6fcb520bd28 (diff)
downloadlinux-d9def184b39b966b7496dfbfad126808d3cd701b.tar.xz
isci: Add support for user parameters in SCIC layer
Add support for the following parameters in SCIC: /** * This field specifies the NOTIFY (ENABLE SPIN UP) primitive * insertion frequency for this phy index. */ u32 notify_enable_spin_up_insertion_frequency; /** * This method specifies the number of transmitted DWORDs within which * to transmit a single ALIGN primitive. This value applies regardless * of what type of device is attached or connection state. A value of * 0 indicates that no ALIGN primitives will be inserted. */ u16 align_insertion_frequency; /** * This method specifies the number of transmitted DWORDs within which * to transmit 2 ALIGN primitives. This applies for SAS connections * only. A minimum value of 3 is required for this field. */ u16 in_connection_align_insertion_frequency; Signed-off-by: Krzysztof Wierzbicki <Krzysztof.Wierzbicki@intel.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Diffstat (limited to 'drivers/scsi/isci/core/scic_sds_phy.c')
-rw-r--r--drivers/scsi/isci/core/scic_sds_phy.c16
1 files changed, 15 insertions, 1 deletions
diff --git a/drivers/scsi/isci/core/scic_sds_phy.c b/drivers/scsi/isci/core/scic_sds_phy.c
index bd0a6ba..ecd7cc6 100644
--- a/drivers/scsi/isci/core/scic_sds_phy.c
+++ b/drivers/scsi/isci/core/scic_sds_phy.c
@@ -125,6 +125,7 @@ static enum sci_status scic_sds_phy_link_layer_initialization(
u32 parity_check = 0;
u32 parity_count = 0;
u32 link_layer_control;
+ u32 clksm_value = 0;
this_phy->link_layer_registers = link_layer_registers;
@@ -199,7 +200,20 @@ static enum sci_status scic_sds_phy_link_layer_initialization(
SCU_SAS_PHYCAP_WRITE(this_phy, phy_capabilities.u.all);
/* Set the enable spinup period but disable the ability to send notify enable spinup */
- SCU_SAS_ENSPINUP_WRITE(this_phy, SCU_ENSPINUP_GEN_VAL(COUNT, 0x33));
+ SCU_SAS_ENSPINUP_WRITE(this_phy, SCU_ENSPINUP_GEN_VAL(COUNT,
+ this_phy->owning_port->owning_controller->user_parameters.sds1.
+ phys[this_phy->phy_index].notify_enable_spin_up_insertion_frequency));
+
+ /* Write the ALIGN Insertion Ferequency for connected phy and inpendent of connected state */
+ clksm_value = SCU_ALIGN_INSERTION_FREQUENCY_GEN_VAL(CONNECTED,
+ this_phy->owning_port->owning_controller->user_parameters.sds1.
+ phys[this_phy->phy_index].in_connection_align_insertion_frequency);
+
+ clksm_value |= SCU_ALIGN_INSERTION_FREQUENCY_GEN_VAL(GENERAL,
+ this_phy->owning_port->owning_controller->user_parameters.sds1.
+ phys[this_phy->phy_index].align_insertion_frequency);
+
+ SCU_SAS_CLKSM_WRITE(this_phy, clksm_value);
#if defined(CONFIG_PBG_HBA_A0) || defined(CONFIG_PBG_HBA_A2) || defined(CONFIG_PBG_HBA_BETA)
/* / @todo Provide a way to write this register correctly */