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author | Chao Fu <B44548@freescale.com> | 2014-02-12 07:29:05 (GMT) |
---|---|---|
committer | Mark Brown <broonie@linaro.org> | 2014-02-16 01:15:23 (GMT) |
commit | 1acbdeb92c87fc18eade0815dedc257fe45b88b7 (patch) | |
tree | 8e4b34fade904bbd4e01c94f90212d9ad6654eba /drivers/spi/Kconfig | |
parent | 38dbfb59d1175ef458d006556061adeaa8751b72 (diff) | |
download | linux-1acbdeb92c87fc18eade0815dedc257fe45b88b7.tar.xz |
spi/fsl-dspi: Convert to use regmap and add big-endian support
Freescale DSPI module will have two endianess in different platform,
but ARM is little endian. So when DSPI in big endian, core in little endian,
readl and writel can not adjust R/W register in this condition.
This patch will remove general readl/writel, and import regmap mechanism.
Data endian will be transfered in regmap APIs.
Documents: dspi add bool "big-endian" in dts node if DSPI module
work in big endian.
Signed-off-by: Chao Fu <b44548@freescale.com>
Reviewed-by: Xiubo Li <Li.Xiubo@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Diffstat (limited to 'drivers/spi/Kconfig')
-rw-r--r-- | drivers/spi/Kconfig | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index ba9310b..00e9510 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -270,6 +270,7 @@ config SPI_FSL_SPI config SPI_FSL_DSPI tristate "Freescale DSPI controller" select SPI_BITBANG + select REGMAP_MMIO depends on SOC_VF610 || COMPILE_TEST help This enables support for the Freescale DSPI controller in master |