staging: fsl-dpaa2/eth: Use DMA APIs for address translations

Use the correct APIs for translating a DMA-mapped IOVA address
into a virtual one.

Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com>

1 files changed, 20 insertions, 6 deletions

diff --git a/drivers/staging/fsl-dpaa2/ethernet/dpaa2-eth.c b/drivers/staging/fsl-dpaa2/ethernet/dpaa2-eth.c
index ac55aa7..c7bf585 100644
--- a/drivers/staging/fsl-dpaa2/ethernet/dpaa2-eth.c
+++ b/drivers/staging/fsl-dpaa2/ethernet/dpaa2-eth.c
@@ -38,6 +38,7 @@
 #include <linux/kthread.h>
 #include <linux/msi.h>
 #include <linux/net_tstamp.h>
+#include <linux/iommu.h>
 
 #include "../../fsl-mc/include/dpbp.h"
 #include "../../fsl-mc/include/dpcon.h"
@@ -58,6 +59,15 @@ MODULE_DESCRIPTION("Freescale DPAA2 Ethernet Driver");
 
 const char dpaa2_eth_drv_version[] = "0.1";
 
+void *dpaa2_eth_iova_to_virt(struct iommu_domain *domain, dma_addr_t iova_addr)
+{
+	phys_addr_t phys_addr;
+
+	phys_addr = domain ? iommu_iova_to_phys(domain, iova_addr) : phys_addr;
+
+	return phys_to_virt(phys_addr);
+}
+
 static void validate_rx_csum(struct dpaa2_eth_priv *priv,
 			     u32 fd_status,
 			     struct sk_buff *skb)
@@ -102,10 +112,11 @@ static void free_rx_fd(struct dpaa2_eth_priv *priv,
 	sgt = vaddr + dpaa2_fd_get_offset(fd);
 	for (i = 0; i < DPAA2_ETH_MAX_SG_ENTRIES; i++) {
 		addr = dpaa2_sg_get_addr(&sgt[i]);
+		sg_vaddr = dpaa2_eth_iova_to_virt(priv->iommu_domain, addr);
+
 		dma_unmap_single(dev, addr, DPAA2_ETH_RX_BUF_SIZE,
 				 DMA_FROM_DEVICE);
 
-		sg_vaddr = phys_to_virt(addr);
 		put_page(virt_to_head_page(sg_vaddr));
 
 		if (dpaa2_sg_is_final(&sgt[i]))
@@ -162,10 +173,10 @@ static struct sk_buff *build_frag_skb(struct dpaa2_eth_priv *priv,
 
 		/* Get the address and length from the S/G entry */
 		sg_addr = dpaa2_sg_get_addr(sge);
+		sg_vaddr = dpaa2_eth_iova_to_virt(priv->iommu_domain, sg_addr);
 		dma_unmap_single(dev, sg_addr, DPAA2_ETH_RX_BUF_SIZE,
 				 DMA_FROM_DEVICE);
 
-		sg_vaddr = phys_to_virt(sg_addr);
 		sg_length = dpaa2_sg_get_len(sge);
 
 		if (i == 0) {
@@ -226,8 +237,8 @@ static void dpaa2_eth_rx(struct dpaa2_eth_priv *priv,
 	/* Tracing point */
 	trace_dpaa2_rx_fd(priv->net_dev, fd);
 
+	vaddr = dpaa2_eth_iova_to_virt(priv->iommu_domain, addr);
 	dma_unmap_single(dev, addr, DPAA2_ETH_RX_BUF_SIZE, DMA_FROM_DEVICE);
-	vaddr = phys_to_virt(addr);
 
 	/* HWA - FAS, timestamp */
 	fas = dpaa2_eth_get_fas(vaddr);
@@ -316,8 +327,8 @@ static void dpaa2_eth_rx_err(struct dpaa2_eth_priv *priv,
 	u32 status = 0;
 	bool check_fas_errors = false;
 
+	vaddr = dpaa2_eth_iova_to_virt(priv->iommu_domain, addr);
 	dma_unmap_single(dev, addr, DPAA2_ETH_RX_BUF_SIZE, DMA_FROM_DEVICE);
-	vaddr = phys_to_virt(addr);
 
 	/* check frame errors in the FD field */
 	if (fd->simple.ctrl & DPAA2_FD_RX_ERR_MASK) {
@@ -604,7 +615,7 @@ static void free_tx_fd(const struct dpaa2_eth_priv *priv,
 	struct dpaa2_fas *fas;
 
 	fd_addr = dpaa2_fd_get_addr(fd);
-	skbh = phys_to_virt(fd_addr);
+	skbh = dpaa2_eth_iova_to_virt(priv->iommu_domain, fd_addr);
 
 	/* HWA - FAS, timestamp (for Tx confirmation frames) */
 	fas = dpaa2_eth_get_fas(skbh);
@@ -967,10 +978,11 @@ static void drain_bufs(struct dpaa2_eth_priv *priv, int count)
 		}
 		for (i = 0; i < ret; i++) {
 			/* Same logic as on regular Rx path */
+			vaddr = dpaa2_eth_iova_to_virt(priv->iommu_domain,
+						       buf_array[i]);
 			dma_unmap_single(dev, buf_array[i],
 					 DPAA2_ETH_RX_BUF_SIZE,
 					 DMA_FROM_DEVICE);
-			vaddr = phys_to_virt(buf_array[i]);
 			put_page(virt_to_head_page(vaddr));
 		}
 	} while (ret);
@@ -2926,6 +2938,8 @@ static int dpaa2_eth_probe(struct fsl_mc_device *dpni_dev)
 	priv = netdev_priv(net_dev);
 	priv->net_dev = net_dev;
 
+	priv->iommu_domain = iommu_get_domain_for_dev(dev);
+
 	/* Obtain a MC portal */
 	err = fsl_mc_portal_allocate(dpni_dev, FSL_MC_IO_ATOMIC_CONTEXT_PORTAL,
 				     &priv->mc_io);