diff options
| author | Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> | 2014-11-13 15:01:13 (GMT) |
|---|---|---|
| committer | Eduardo Valentin <edubezval@gmail.com> | 2014-11-20 14:53:46 (GMT) |
| commit | 72d1100b736d2ff597c5aa73bbef12050c686ee4 (patch) | |
| tree | b2f832412cd8d20eb03eb833c9c557b379ccbbea /drivers/thermal/samsung/exynos_tmu_data.c | |
| parent | fe87789cd437378e7cf72c43b753703b2a835fc3 (diff) | |
| download | linux-72d1100b736d2ff597c5aa73bbef12050c686ee4.tar.xz | |
thermal: exynos: add ->tmu_initialize method
Add ->tmu_initialize method to struct exynos_tmu_data and
use it in exynos_tmu_initialize(). Then add ->tmu_initialize
implementations for Exynos4210, Exynos4412+ and Exynos5440.
Finally remove no longer needed reg->threshold_th[0,1],
reg->intclr_[fall,rise]_shift and reg->intclr_[rise,fall]_mask
abstractions.
There are more improvements available in the future on top
of this patch like merging HW_TRIP level setting with setting
of other levels for Exynos4412+ or adding separate method
for clearing IRQs using INTCLEAR register (for Exynos5420,
Exynos5260 and Exynos4412+).
There should be no functional changes caused by this patch.
Cc: Amit Daniel Kachhap <amit.daniel@samsung.com>
Cc: Lukasz Majewski <l.majewski@samsung.com>
Cc: Eduardo Valentin <edubezval@gmail.com>
Cc: Zhang Rui <rui.zhang@intel.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Tested-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
Diffstat (limited to 'drivers/thermal/samsung/exynos_tmu_data.c')
| -rw-r--r-- | drivers/thermal/samsung/exynos_tmu_data.c | 11 |
1 files changed, 0 insertions, 11 deletions
diff --git a/drivers/thermal/samsung/exynos_tmu_data.c b/drivers/thermal/samsung/exynos_tmu_data.c index 1ed8bdc..db3b3bc 100644 --- a/drivers/thermal/samsung/exynos_tmu_data.c +++ b/drivers/thermal/samsung/exynos_tmu_data.c @@ -28,7 +28,6 @@ static const struct exynos_tmu_registers exynos4210_tmu_registers = { .tmu_ctrl = EXYNOS_TMU_REG_CONTROL, .tmu_cur_temp = EXYNOS_TMU_REG_CURRENT_TEMP, - .threshold_th0 = EXYNOS4210_TMU_REG_TRIG_LEVEL0, .tmu_inten = EXYNOS_TMU_REG_INTEN, .inten_rise0_shift = EXYNOS_TMU_INTEN_RISE0_SHIFT, .inten_rise1_shift = EXYNOS_TMU_INTEN_RISE1_SHIFT, @@ -83,8 +82,6 @@ struct exynos_tmu_init_data const exynos4210_default_tmu_data = { static const struct exynos_tmu_registers exynos3250_tmu_registers = { .tmu_ctrl = EXYNOS_TMU_REG_CONTROL, .tmu_cur_temp = EXYNOS_TMU_REG_CURRENT_TEMP, - .threshold_th0 = EXYNOS_THD_TEMP_RISE, - .threshold_th1 = EXYNOS_THD_TEMP_FALL, .tmu_inten = EXYNOS_TMU_REG_INTEN, .inten_rise0_shift = EXYNOS_TMU_INTEN_RISE0_SHIFT, .inten_rise1_shift = EXYNOS_TMU_INTEN_RISE1_SHIFT, @@ -152,8 +149,6 @@ struct exynos_tmu_init_data const exynos3250_default_tmu_data = { static const struct exynos_tmu_registers exynos4412_tmu_registers = { .tmu_ctrl = EXYNOS_TMU_REG_CONTROL, .tmu_cur_temp = EXYNOS_TMU_REG_CURRENT_TEMP, - .threshold_th0 = EXYNOS_THD_TEMP_RISE, - .threshold_th1 = EXYNOS_THD_TEMP_FALL, .tmu_inten = EXYNOS_TMU_REG_INTEN, .inten_rise0_shift = EXYNOS_TMU_INTEN_RISE0_SHIFT, .inten_rise1_shift = EXYNOS_TMU_INTEN_RISE1_SHIFT, @@ -234,8 +229,6 @@ struct exynos_tmu_init_data const exynos5250_default_tmu_data = { static const struct exynos_tmu_registers exynos5260_tmu_registers = { .tmu_ctrl = EXYNOS_TMU_REG_CONTROL, .tmu_cur_temp = EXYNOS_TMU_REG_CURRENT_TEMP, - .threshold_th0 = EXYNOS_THD_TEMP_RISE, - .threshold_th1 = EXYNOS_THD_TEMP_FALL, .tmu_inten = EXYNOS5260_TMU_REG_INTEN, .inten_rise0_shift = EXYNOS_TMU_INTEN_RISE0_SHIFT, .inten_rise1_shift = EXYNOS_TMU_INTEN_RISE1_SHIFT, @@ -306,8 +299,6 @@ struct exynos_tmu_init_data const exynos5260_default_tmu_data = { static const struct exynos_tmu_registers exynos5420_tmu_registers = { .tmu_ctrl = EXYNOS_TMU_REG_CONTROL, .tmu_cur_temp = EXYNOS_TMU_REG_CURRENT_TEMP, - .threshold_th0 = EXYNOS_THD_TEMP_RISE, - .threshold_th1 = EXYNOS_THD_TEMP_FALL, .tmu_inten = EXYNOS_TMU_REG_INTEN, .inten_rise0_shift = EXYNOS_TMU_INTEN_RISE0_SHIFT, .inten_rise1_shift = EXYNOS_TMU_INTEN_RISE1_SHIFT, @@ -385,8 +376,6 @@ struct exynos_tmu_init_data const exynos5420_default_tmu_data = { static const struct exynos_tmu_registers exynos5440_tmu_registers = { .tmu_ctrl = EXYNOS5440_TMU_S0_7_CTRL, .tmu_cur_temp = EXYNOS5440_TMU_S0_7_TEMP, - .threshold_th0 = EXYNOS5440_TMU_S0_7_TH0, - .threshold_th1 = EXYNOS5440_TMU_S0_7_TH1, .tmu_inten = EXYNOS5440_TMU_S0_7_IRQEN, .inten_rise0_shift = EXYNOS5440_TMU_INTEN_RISE0_SHIFT, .inten_rise1_shift = EXYNOS5440_TMU_INTEN_RISE1_SHIFT, |