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authorRoland Stigge <stigge@antcom.de>2012-06-11 19:57:13 (GMT)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2012-07-26 20:37:02 (GMT)
commit6b583fa318f7229a398fc04369141bf2f3522db5 (patch)
treee869564920804643603f872fb53d61865f21a638 /drivers/tty
parent24a7d449b066bdba8b8b2486dc481f02043e0656 (diff)
downloadlinux-6b583fa318f7229a398fc04369141bf2f3522db5.tar.xz
serial/8250: Add LPC3220 standard UART type
LPC32xx has "Standard" UARTs that are actually 16550A compatible but have bigger FIFOs. Since the already supported 16X50 line still doesn't match here, we agreed on adding a new type. Signed-off-by: Roland Stigge <stigge@antcom.de> Acked-by: Alan Cox <alan@linux.intel.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/tty')
-rw-r--r--drivers/tty/serial/8250/8250.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/tty/serial/8250/8250.c b/drivers/tty/serial/8250/8250.c
index 6e1958a..8123f78 100644
--- a/drivers/tty/serial/8250/8250.c
+++ b/drivers/tty/serial/8250/8250.c
@@ -282,6 +282,14 @@ static const struct serial8250_config uart_config[] = {
.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
.flags = UART_CAP_FIFO | UART_CAP_AFE | UART_CAP_EFR,
},
+ [PORT_LPC3220] = {
+ .name = "LPC3220",
+ .fifo_size = 64,
+ .tx_loadsz = 32,
+ .fcr = UART_FCR_DMA_SELECT | UART_FCR_ENABLE_FIFO |
+ UART_FCR_R_TRIG_00 | UART_FCR_T_TRIG_00,
+ .flags = UART_CAP_FIFO,
+ },
};
/* Uart divisor latch read */