summaryrefslogtreecommitdiff
path: root/drivers/usb/dwc3/ep0.c
diff options
context:
space:
mode:
authorFelipe Balbi <balbi@ti.com>2012-05-31 08:00:28 (GMT)
committerFelipe Balbi <balbi@ti.com>2012-06-03 20:08:27 (GMT)
commitc8cf7af452ad2eb49cad13450090cdc432b5a06d (patch)
tree06bab6d4ce24549fe5373c7f1aba2ca42548960e /drivers/usb/dwc3/ep0.c
parentef21ede65ee3e0dfd8f2cb37de8892816e2f1257 (diff)
downloadlinux-c8cf7af452ad2eb49cad13450090cdc432b5a06d.tar.xz
usb: dwc3: ep0: be careful with endianness on SetSEL command
USB is always little endian, but this driver could run on non little endian cpus. Let's be carefull with that. Signed-off-by: Felipe Balbi <balbi@ti.com>
Diffstat (limited to 'drivers/usb/dwc3/ep0.c')
-rw-r--r--drivers/usb/dwc3/ep0.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/usb/dwc3/ep0.c b/drivers/usb/dwc3/ep0.c
index 83fcf39..3185fe1 100644
--- a/drivers/usb/dwc3/ep0.c
+++ b/drivers/usb/dwc3/ep0.c
@@ -515,8 +515,8 @@ static void dwc3_ep0_set_sel_cmpl(struct usb_ep *ep, struct usb_request *req)
dwc->u1sel = timing.u1sel;
dwc->u1pel = timing.u1pel;
- dwc->u2sel = timing.u2sel;
- dwc->u2pel = timing.u2pel;
+ dwc->u2sel = le16_to_cpu(timing.u2sel);
+ dwc->u2pel = le16_to_cpu(timing.u2pel);
reg = dwc3_readl(dwc->regs, DWC3_DCTL);
if (reg & DWC3_DCTL_INITU2ENA)