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author | Paul Mundt <lethal@linux-sh.org> | 2011-03-17 07:44:08 (GMT) |
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committer | Paul Mundt <lethal@linux-sh.org> | 2011-03-17 07:44:08 (GMT) |
commit | 1d2a1959fe534279cf37aba20b08c24c20840e52 (patch) | |
tree | 67c0b9aa7fe22a44bf0b4af88947799203eb8f67 /drivers/usb/otg/langwell_otg.c | |
parent | 5a79ce76e9bb8f4b2cd8106ee36d15ee05013bcf (diff) | |
parent | 054cfaacf88865bff1dd58d305443d5d6c068a08 (diff) | |
download | linux-1d2a1959fe534279cf37aba20b08c24c20840e52.tar.xz |
Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6 into sh-latest
Diffstat (limited to 'drivers/usb/otg/langwell_otg.c')
-rw-r--r-- | drivers/usb/otg/langwell_otg.c | 48 |
1 files changed, 11 insertions, 37 deletions
diff --git a/drivers/usb/otg/langwell_otg.c b/drivers/usb/otg/langwell_otg.c index 9fea482..7f9b8cd 100644 --- a/drivers/usb/otg/langwell_otg.c +++ b/drivers/usb/otg/langwell_otg.c @@ -174,50 +174,24 @@ static int langwell_otg_set_power(struct otg_transceiver *otg, return 0; } -/* A-device drives vbus, controlled through PMIC CHRGCNTL register*/ +/* A-device drives vbus, controlled through IPC commands */ static int langwell_otg_set_vbus(struct otg_transceiver *otg, bool enabled) { struct langwell_otg *lnw = the_transceiver; - u8 r; + u8 sub_id; dev_dbg(lnw->dev, "%s <--- %s\n", __func__, enabled ? "on" : "off"); - /* FIXME: surely we should cache this on the first read. If not use - readv to avoid two transactions */ - if (intel_scu_ipc_ioread8(0x00, &r) < 0) { - dev_dbg(lnw->dev, "Failed to read PMIC register 0xD2"); - return -EBUSY; - } - if ((r & 0x03) != 0x02) { - dev_dbg(lnw->dev, "not NEC PMIC attached\n"); - return -EBUSY; - } - - if (intel_scu_ipc_ioread8(0x20, &r) < 0) { - dev_dbg(lnw->dev, "Failed to read PMIC register 0xD2"); - return -EBUSY; - } - - if ((r & 0x20) == 0) { - dev_dbg(lnw->dev, "no battery attached\n"); - return -EBUSY; - } + if (enabled) + sub_id = 0x8; /* Turn on the VBus */ + else + sub_id = 0x9; /* Turn off the VBus */ - /* Workaround for battery attachment issue */ - if (r == 0x34) { - dev_dbg(lnw->dev, "no battery attached on SH\n"); + if (intel_scu_ipc_simple_command(0xef, sub_id)) { + dev_dbg(lnw->dev, "Failed to set Vbus via IPC commands\n"); return -EBUSY; } - dev_dbg(lnw->dev, "battery attached. 2 reg = %x\n", r); - - /* workaround: FW detect writing 0x20/0xc0 to d4 event. - * this is only for NEC PMIC. - */ - - if (intel_scu_ipc_iowrite8(0xD4, enabled ? 0x20 : 0xC0)) - dev_dbg(lnw->dev, "Failed to write PMIC.\n"); - dev_dbg(lnw->dev, "%s --->\n", __func__); return 0; @@ -394,14 +368,14 @@ static void langwell_otg_phy_low_power(int on) dev_dbg(lnw->dev, "%s <--- done\n", __func__); } -/* After drv vbus, add 2 ms delay to set PHCD */ +/* After drv vbus, add 5 ms delay to set PHCD */ static void langwell_otg_phy_low_power_wait(int on) { struct langwell_otg *lnw = the_transceiver; - dev_dbg(lnw->dev, "add 2ms delay before programing PHCD\n"); + dev_dbg(lnw->dev, "add 5ms delay before programing PHCD\n"); - mdelay(2); + mdelay(5); langwell_otg_phy_low_power(on); } |