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author | Takashi Iwai <tiwai@suse.de> | 2016-03-08 09:49:43 (GMT) |
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committer | Takashi Iwai <tiwai@suse.de> | 2016-03-08 09:49:43 (GMT) |
commit | 56d94d70398f0fbb1863a03a145db1a86f009a71 (patch) | |
tree | 9e52dc537f8f8359c70b66f5000192bb280b41b9 /drivers/video/fbdev/imxfb.c | |
parent | bb63f726f98bec032c7322a9c36eb4167307d856 (diff) | |
parent | fc4f000bf8c0cbf38f44de6bd5e225574e572ed4 (diff) | |
download | linux-56d94d70398f0fbb1863a03a145db1a86f009a71.tar.xz |
Merge branch 'topic/hda' into for-next
Diffstat (limited to 'drivers/video/fbdev/imxfb.c')
-rw-r--r-- | drivers/video/fbdev/imxfb.c | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/drivers/video/fbdev/imxfb.c b/drivers/video/fbdev/imxfb.c index cee8860..bb2f1e8 100644 --- a/drivers/video/fbdev/imxfb.c +++ b/drivers/video/fbdev/imxfb.c @@ -902,6 +902,21 @@ static int imxfb_probe(struct platform_device *pdev) goto failed_getclock; } + /* + * The LCDC controller does not have an enable bit. The + * controller starts directly when the clocks are enabled. + * If the clocks are enabled when the controller is not yet + * programmed with proper register values (enabled at the + * bootloader, for example) then it just goes into some undefined + * state. + * To avoid this issue, let's enable and disable LCDC IPG clock + * so that we force some kind of 'reset' to the LCDC block. + */ + ret = clk_prepare_enable(fbi->clk_ipg); + if (ret) + goto failed_getclock; + clk_disable_unprepare(fbi->clk_ipg); + fbi->clk_ahb = devm_clk_get(&pdev->dev, "ahb"); if (IS_ERR(fbi->clk_ahb)) { ret = PTR_ERR(fbi->clk_ahb); |