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authorArchit Taneja <archit@ti.com>2013-09-10 10:51:10 (GMT)
committerTomi Valkeinen <tomi.valkeinen@ti.com>2014-05-09 12:11:29 (GMT)
commit8955b727afb472125152508af2d4ec1d41442b0b (patch)
tree3684bdf6cb818b274ca738fcf37c5343969ebfb8 /drivers/video
parentdcf5f7299e94d113aa49b4e099c4b9f289d17ed2 (diff)
downloadlinux-8955b727afb472125152508af2d4ec1d41442b0b.tar.xz
OMAPDSS: HDMI: support larger register offsets for OMAP5 HDMI core
The HDMI core IP on OMAP5 has a wider address range for registers. The offsets for the later registers can't fit into the u16 type currently used for hdmi register read and write functions. Use u32 for offsets instead. Signed-off-by: Archit Taneja <archit@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Diffstat (limited to 'drivers/video')
-rw-r--r--drivers/video/fbdev/omap2/dss/hdmi.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/video/fbdev/omap2/dss/hdmi.h b/drivers/video/fbdev/omap2/dss/hdmi.h
index d784b2c..0e5979e 100644
--- a/drivers/video/fbdev/omap2/dss/hdmi.h
+++ b/drivers/video/fbdev/omap2/dss/hdmi.h
@@ -361,13 +361,13 @@ struct hdmi_core_data {
struct hdmi_core_infoframe_avi avi_cfg;
};
-static inline void hdmi_write_reg(void __iomem *base_addr, const u16 idx,
+static inline void hdmi_write_reg(void __iomem *base_addr, const u32 idx,
u32 val)
{
__raw_writel(val, base_addr + idx);
}
-static inline u32 hdmi_read_reg(void __iomem *base_addr, const u16 idx)
+static inline u32 hdmi_read_reg(void __iomem *base_addr, const u32 idx)
{
return __raw_readl(base_addr + idx);
}