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| author | Tomi Valkeinen <tomi.valkeinen@ti.com> | 2015-03-24 13:46:34 (GMT) |
|---|---|---|
| committer | Tomi Valkeinen <tomi.valkeinen@ti.com> | 2015-06-17 12:53:40 (GMT) |
| commit | a9fad6886f5229fc9989ac6cdd7ddecbf570a58f (patch) | |
| tree | ba02721c18ecc96e77c6372047086fedec0d9ff4 /drivers | |
| parent | 9bba13f0d74cea808f417370961bb3421a09bcb6 (diff) | |
| download | linux-a9fad6886f5229fc9989ac6cdd7ddecbf570a58f.tar.xz | |
OMAPDSS: HDMI: wait for framedone when stopping video
At the moment when HDMI video output is stopped, we just clear the
enable bit and return. While it's unclear if this can cause any issues,
I think it's still better to wait for FRAMEDONE interrupt after clearing
the enable bit so that we're sure the HDMI IP has finished.
As we don't have any ready-made irq handling for HDMI, and this only
needs to be done when disabling the HDMI output, this patch implements a
simple loop with sleep, polling the FRAMEDONE bit.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/video/fbdev/omap2/dss/hdmi_wp.c | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/drivers/video/fbdev/omap2/dss/hdmi_wp.c b/drivers/video/fbdev/omap2/dss/hdmi_wp.c index c15377e..7c544bc 100644 --- a/drivers/video/fbdev/omap2/dss/hdmi_wp.c +++ b/drivers/video/fbdev/omap2/dss/hdmi_wp.c @@ -110,7 +110,23 @@ int hdmi_wp_video_start(struct hdmi_wp_data *wp) void hdmi_wp_video_stop(struct hdmi_wp_data *wp) { + int i; + + hdmi_write_reg(wp->base, HDMI_WP_IRQSTATUS, HDMI_IRQ_VIDEO_FRAME_DONE); + REG_FLD_MOD(wp->base, HDMI_WP_VIDEO_CFG, false, 31, 31); + + for (i = 0; i < 50; ++i) { + u32 v; + + msleep(20); + + v = hdmi_read_reg(wp->base, HDMI_WP_IRQSTATUS_RAW); + if (v & HDMI_IRQ_VIDEO_FRAME_DONE) + return; + } + + DSSERR("no HDMI FRAMEDONE when disabling output\n"); } void hdmi_wp_video_config_format(struct hdmi_wp_data *wp, |