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| author | Pi-Cheng Chen <pi-cheng.chen@linaro.org> | 2015-08-17 09:24:23 (GMT) |
|---|---|---|
| committer | Rafael J. Wysocki <rafael.j.wysocki@intel.com> | 2015-09-01 13:50:11 (GMT) |
| commit | c9c96ae2c57d91ea2b73ef447fdd44c760a96d97 (patch) | |
| tree | 94daa4a87a20e87aac5513754821ec4cb94317d5 /drivers | |
| parent | 5aecc3c8a24a7c2db29ec4a927bbb08befcb508e (diff) | |
| download | linux-c9c96ae2c57d91ea2b73ef447fdd44c760a96d97.tar.xz | |
dt-bindings: mediatek: Add MT8173 CPU DVFS clock bindings
This patch adds the clock and regulator consumer properties part of
document for CPU DVFS clocks on Mediatek MT8173 SoC.
Signed-off-by: Pi-Cheng Chen <pi-cheng.chen@linaro.org>
Acked-by: Michael Turquette <mturquette@baylibre.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Diffstat (limited to 'drivers')
0 files changed, 0 insertions, 0 deletions