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authorJoerg Roedel <joerg.roedel@amd.com>2011-11-25 10:41:31 (GMT)
committerJoerg Roedel <joerg.roedel@amd.com>2011-12-12 13:54:44 (GMT)
commitcbc33a9085995e21f52a66380d108d64916b6787 (patch)
treeb7e01a392079547bcb2abbce8868ff3ce14c3e5a /drivers
parent1a29ac014a68e5da8f96d5d8d142b5956eb00b7c (diff)
downloadlinux-cbc33a9085995e21f52a66380d108d64916b6787.tar.xz
iommu/amd: Enable GT mode when supported by IOMMU
This feature needs to be enabled before IOMMUv2 DTEs can be set up. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/iommu/amd_iommu_init.c9
-rw-r--r--drivers/iommu/amd_iommu_types.h1
2 files changed, 10 insertions, 0 deletions
diff --git a/drivers/iommu/amd_iommu_init.c b/drivers/iommu/amd_iommu_init.c
index 60716ce..2c25ae3 100644
--- a/drivers/iommu/amd_iommu_init.c
+++ b/drivers/iommu/amd_iommu_init.c
@@ -623,6 +623,14 @@ static void __init free_ppr_log(struct amd_iommu *iommu)
free_pages((unsigned long)iommu->ppr_log, get_order(PPR_LOG_SIZE));
}
+static void iommu_enable_gt(struct amd_iommu *iommu)
+{
+ if (!iommu_feature(iommu, FEATURE_GT))
+ return;
+
+ iommu_feature_enable(iommu, CONTROL_GT_EN);
+}
+
/* sets a specific bit in the device table entry. */
static void set_dev_entry_bit(u16 devid, u8 bit)
{
@@ -1338,6 +1346,7 @@ static void enable_iommus(void)
iommu_enable_command_buffer(iommu);
iommu_enable_event_buffer(iommu);
iommu_enable_ppr_log(iommu);
+ iommu_enable_gt(iommu);
iommu_set_exclusion_range(iommu);
iommu_init_msi(iommu);
iommu_enable(iommu);
diff --git a/drivers/iommu/amd_iommu_types.h b/drivers/iommu/amd_iommu_types.h
index 4dc2309..a6e1dc6 100644
--- a/drivers/iommu/amd_iommu_types.h
+++ b/drivers/iommu/amd_iommu_types.h
@@ -129,6 +129,7 @@
#define CONTROL_PPFLOG_EN 0x0dULL
#define CONTROL_PPFINT_EN 0x0eULL
#define CONTROL_PPR_EN 0x0fULL
+#define CONTROL_GT_EN 0x10ULL
/* command specific defines */
#define CMD_COMPL_WAIT 0x01