diff options
author | Peter Hurley <peter@hurleysoftware.com> | 2016-01-16 23:23:43 (GMT) |
---|---|---|
committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2016-02-07 06:07:37 (GMT) |
commit | 088da2a17619cf0113b62a76ad38c6a14470ffa6 (patch) | |
tree | 98d9d71255703026b0ce2cee89e5d6e8d41aa3a7 /drivers | |
parent | 4d118c9a866590850dad8689262a95345d2c6e09 (diff) | |
download | linux-088da2a17619cf0113b62a76ad38c6a14470ffa6.tar.xz |
of: earlycon: Initialize port fields from DT properties
Read the optional "reg-offset", "reg-shift", "reg-io-width" and endianness
properties and initialize the respective struct uart_port field if found.
NB: These bindings are common to several drivers and the values merely
indicate the default value; the registering earlycon setup() method can
simply override the values if required.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Peter Hurley <peter@hurleysoftware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/of/fdt.c | 2 | ||||
-rw-r--r-- | drivers/tty/serial/earlycon.c | 31 |
2 files changed, 32 insertions, 1 deletions
diff --git a/drivers/of/fdt.c b/drivers/of/fdt.c index cfd3b35..e8fd54a 100644 --- a/drivers/of/fdt.c +++ b/drivers/of/fdt.c @@ -839,7 +839,7 @@ static int __init early_init_dt_scan_chosen_serial(void) if (addr == OF_BAD_ADDR) return -ENXIO; - of_setup_earlycon(addr, match, options); + of_setup_earlycon(addr, match, offset, options); return 0; } return -ENODEV; diff --git a/drivers/tty/serial/earlycon.c b/drivers/tty/serial/earlycon.c index 7509ee34d..7089667 100644 --- a/drivers/tty/serial/earlycon.c +++ b/drivers/tty/serial/earlycon.c @@ -19,6 +19,7 @@ #include <linux/io.h> #include <linux/serial_core.h> #include <linux/sizes.h> +#include <linux/of_fdt.h> #ifdef CONFIG_FIX_EARLYCON_MEM #include <asm/fixmap.h> @@ -219,10 +220,13 @@ early_param("earlycon", param_setup_earlycon); int __init of_setup_earlycon(unsigned long addr, const struct earlycon_id *match, + unsigned long node, const char *options) { int err; struct uart_port *port = &early_console_dev.port; + const __be32 *val; + bool big_endian; spin_lock_init(&port->lock); port->iotype = UPIO_MEM; @@ -230,6 +234,33 @@ int __init of_setup_earlycon(unsigned long addr, port->uartclk = BASE_BAUD * 16; port->membase = earlycon_map(addr, SZ_4K); + val = of_get_flat_dt_prop(node, "reg-offset", NULL); + if (val) + port->mapbase += be32_to_cpu(*val); + val = of_get_flat_dt_prop(node, "reg-shift", NULL); + if (val) + port->regshift = be32_to_cpu(*val); + big_endian = of_get_flat_dt_prop(node, "big-endian", NULL) != NULL || + (IS_ENABLED(CONFIG_CPU_BIG_ENDIAN) && + of_get_flat_dt_prop(node, "native-endian", NULL) != NULL); + val = of_get_flat_dt_prop(node, "reg-io-width", NULL); + if (val) { + switch (be32_to_cpu(*val)) { + case 1: + port->iotype = UPIO_MEM; + break; + case 2: + port->iotype = UPIO_MEM16; + break; + case 4: + port->iotype = (big_endian) ? UPIO_MEM32BE : UPIO_MEM32; + break; + default: + pr_warn("[%s] unsupported reg-io-width\n", match->name); + return -EINVAL; + } + } + if (options) { strlcpy(early_console_dev.options, options, sizeof(early_console_dev.options)); |