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authorSergei Shtylyov <sshtylyov@ru.mvista.com>2006-04-30 10:15:58 (GMT)
committerRussell King <rmk+kernel@arm.linux.org.uk>2006-04-30 10:15:58 (GMT)
commit85835f442e5bbf9d3b8f6e574751da8db77016d2 (patch)
tree28bc3bd2734daf51474dcfb255100a0050ffc29c /drivers
parent68ac64cd3fd89fdaa091701f6ab98a9065e9b1b5 (diff)
downloadlinux-85835f442e5bbf9d3b8f6e574751da8db77016d2.tar.xz
[SERIAL] AMD Alchemy UART: claim memory range
I've noticed that the 8250/Au1x00 driver (drivers/serial/8250_au1x00.c) doesn't claim UART memory ranges and uses wrong (KSEG1-based) UART addresses instead of the physical ones. Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/serial/8250.c6
-rw-r--r--drivers/serial/8250_au1x00.c5
2 files changed, 8 insertions, 3 deletions
diff --git a/drivers/serial/8250.c b/drivers/serial/8250.c
index 674b15c..d641ac4 100644
--- a/drivers/serial/8250.c
+++ b/drivers/serial/8250.c
@@ -1906,6 +1906,9 @@ static int serial8250_request_std_resource(struct uart_8250_port *up)
int ret = 0;
switch (up->port.iotype) {
+ case UPIO_AU:
+ size = 0x100000;
+ /* fall thru */
case UPIO_MEM:
if (!up->port.mapbase)
break;
@@ -1938,6 +1941,9 @@ static void serial8250_release_std_resource(struct uart_8250_port *up)
unsigned int size = 8 << up->port.regshift;
switch (up->port.iotype) {
+ case UPIO_AU:
+ size = 0x100000;
+ /* fall thru */
case UPIO_MEM:
if (!up->port.mapbase)
break;
diff --git a/drivers/serial/8250_au1x00.c b/drivers/serial/8250_au1x00.c
index 3d1bfd0..58015fd 100644
--- a/drivers/serial/8250_au1x00.c
+++ b/drivers/serial/8250_au1x00.c
@@ -30,13 +30,12 @@
{ \
.iobase = _base, \
.membase = (void __iomem *)_base,\
- .mapbase = _base, \
+ .mapbase = CPHYSADDR(_base), \
.irq = _irq, \
.uartclk = 0, /* filled */ \
.regshift = 2, \
.iotype = UPIO_AU, \
- .flags = UPF_SKIP_TEST | \
- UPF_IOREMAP, \
+ .flags = UPF_SKIP_TEST \
}
static struct plat_serial8250_port au1x00_data[] = {