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authorAlex Deucher <alexander.deucher@amd.com>2016-06-17 21:05:15 (GMT)
committerAlex Deucher <alexander.deucher@amd.com>2016-07-07 18:54:46 (GMT)
commit93dcc37d2cc9d29e4cc36fd1cc8a9ca4f7109b1d (patch)
treeb338ce6d6ce70cdeec24777eb88090fdb5d25363 /drivers
parent9de06de80e260777c14a0a53ac4326c2d2a5e1eb (diff)
downloadlinux-93dcc37d2cc9d29e4cc36fd1cc8a9ca4f7109b1d.tar.xz
drm/amdgpu: disable compute pipeline sync workaround when using fixed fw
No need to stall the pipe when we are using firmware with the fix. Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c28
1 files changed, 27 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
index adb8778..8f04857 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
@@ -311,6 +311,32 @@ error:
return r;
}
+static bool amdgpu_vm_ring_has_compute_vm_bug(struct amdgpu_ring *ring)
+{
+ struct amdgpu_device *adev = ring->adev;
+ const struct amdgpu_ip_block_version *ip_block;
+
+ if (ring->type != AMDGPU_RING_TYPE_COMPUTE)
+ /* only compute rings */
+ return false;
+
+ ip_block = amdgpu_get_ip_block(adev, AMD_IP_BLOCK_TYPE_GFX);
+ if (!ip_block)
+ return false;
+
+ if (ip_block->major <= 7) {
+ /* gfx7 has no workaround */
+ return true;
+ } else if (ip_block->major == 8) {
+ if (adev->gfx.mec_fw_version >= 673)
+ /* gfx8 is fixed in MEC firmware 673 */
+ return false;
+ else
+ return true;
+ }
+ return false;
+}
+
/**
* amdgpu_vm_flush - hardware flush the vm
*
@@ -339,7 +365,7 @@ int amdgpu_vm_flush(struct amdgpu_ring *ring,
if (ring->funcs->emit_pipeline_sync && (
pd_addr != AMDGPU_VM_NO_FLUSH || gds_switch_needed ||
- ring->type == AMDGPU_RING_TYPE_COMPUTE))
+ amdgpu_vm_ring_has_compute_vm_bug(ring)))
amdgpu_ring_emit_pipeline_sync(ring);
if (ring->funcs->emit_vm_flush &&