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authorNadav Haklai <nadavh@marvell.com>2015-05-26 16:47:23 (GMT)
committerTejun Heo <tj@kernel.org>2015-05-26 18:46:15 (GMT)
commite96998fc200867f005dd14c7d1dd35e1107d4914 (patch)
tree5785262bde741764edfea785df605e1657b02a0f /drivers
parentdbfe8ef5599a5370abc441fcdbb382b656563eb4 (diff)
downloadlinux-e96998fc200867f005dd14c7d1dd35e1107d4914.tar.xz
ata: ahci_mvebu: Fix wrongly set base address for the MBus window setting
According to the Armada 38x datasheet, the window base address registers value is set in bits [31:4] of the register and corresponds to the transaction address bits [47:20]. Therefore, the 32bit base address value should be shifted right by 20bits and left by 4bits, resulting in 16 bit shift right. The bug as not been noticed yet because if the memory available on the platform is less than 2GB, then the base address is zero. [gregory.clement@free-electrons.com: add extra-explanation] Fixes: a3464ed2f14 (ata: ahci_mvebu: new driver for Marvell Armada 380 AHCI interfaces) Signed-off-by: Nadav Haklai <nadavh@marvell.com> Reviewed-by: Omri Itach <omrii@marvell.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Cc: <stable@vger.kernel.org> Signed-off-by: Tejun Heo <tj@kernel.org>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/ata/ahci_mvebu.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/ata/ahci_mvebu.c b/drivers/ata/ahci_mvebu.c
index 23716dd..5928d07 100644
--- a/drivers/ata/ahci_mvebu.c
+++ b/drivers/ata/ahci_mvebu.c
@@ -45,7 +45,7 @@ static void ahci_mvebu_mbus_config(struct ahci_host_priv *hpriv,
writel((cs->mbus_attr << 8) |
(dram->mbus_dram_target_id << 4) | 1,
hpriv->mmio + AHCI_WINDOW_CTRL(i));
- writel(cs->base, hpriv->mmio + AHCI_WINDOW_BASE(i));
+ writel(cs->base >> 16, hpriv->mmio + AHCI_WINDOW_BASE(i));
writel(((cs->size - 1) & 0xffff0000),
hpriv->mmio + AHCI_WINDOW_SIZE(i));
}