diff options
| author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2015-03-12 15:10:27 (GMT) |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2015-03-20 10:48:03 (GMT) |
| commit | f4896f1529c43fb0688164ed33aebdf525a34fb7 (patch) | |
| tree | 39b1b1115c0940d692cfc07952473f76ad90ef9c /drivers | |
| parent | ec7adb6ee79c8c9fe64d63ad638a31cd62e55515 (diff) | |
| download | linux-f4896f1529c43fb0688164ed33aebdf525a34fb7.tar.xz | |
drm/i915: Make the DP rates int instead of uint32_t
No point in using uint32_t here, just plain old int will do.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Sonika Jindal <sonika.jindal@intel.com>
Reviewed-by: Todd Previte <tprevite@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_dp.c | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index ca60060..a9b9847 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -85,10 +85,9 @@ static const struct dp_link_dpll chv_dpll[] = { { .p1 = 2, .p2 = 1, .n = 1, .m1 = 2, .m2 = 0x6c00000 } } }; /* Skylake supports following rates */ -static const uint32_t gen9_rates[] = { 162000, 216000, 270000, 324000, - 432000, 540000 }; - -static const uint32_t default_rates[] = { 162000, 270000, 540000 }; +static const int gen9_rates[] = { 162000, 216000, 270000, + 324000, 432000, 540000 }; +static const int default_rates[] = { 162000, 270000, 540000 }; /** * is_edp - is the given port attached to an eDP panel (either CPU or PCH) @@ -1142,7 +1141,7 @@ hsw_dp_set_ddi_pll_sel(struct intel_crtc_state *pipe_config, int link_bw) } static int -intel_read_sink_rates(struct intel_dp *intel_dp, uint32_t *sink_rates) +intel_read_sink_rates(struct intel_dp *intel_dp, int *sink_rates) { struct drm_device *dev = intel_dp_to_dev(intel_dp); int i = 0; @@ -1169,7 +1168,7 @@ intel_read_sink_rates(struct intel_dp *intel_dp, uint32_t *sink_rates) } static int -intel_read_source_rates(struct intel_dp *intel_dp, uint32_t *source_rates) +intel_read_source_rates(struct intel_dp *intel_dp, int *source_rates) { struct drm_device *dev = intel_dp_to_dev(intel_dp); int i; @@ -1220,8 +1219,9 @@ intel_dp_set_clock(struct intel_encoder *encoder, } } -static int intel_supported_rates(const uint32_t *source_rates, int source_len, -const uint32_t *sink_rates, int sink_len, uint32_t *supported_rates) +static int intel_supported_rates(const int *source_rates, int source_len, + const int *sink_rates, int sink_len, + int *supported_rates) { int i = 0, j = 0, k = 0; @@ -1248,7 +1248,7 @@ const uint32_t *sink_rates, int sink_len, uint32_t *supported_rates) return k; } -static int rate_to_index(uint32_t find, const uint32_t *rates) +static int rate_to_index(int find, const int *rates) { int i = 0; @@ -1278,9 +1278,9 @@ intel_dp_compute_config(struct intel_encoder *encoder, int max_clock; int bpp, mode_rate; int link_avail, link_clock; - uint32_t sink_rates[8]; - uint32_t supported_rates[8] = {0}; - uint32_t source_rates[8]; + int sink_rates[8]; + int supported_rates[8] = {0}; + int source_rates[8]; int source_len, sink_len, supported_len; sink_len = intel_read_sink_rates(intel_dp, sink_rates); |