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| author | Mark Zhang <markz@nvidia.com> | 2013-12-27 00:44:24 (GMT) |
|---|---|---|
| committer | Peter De Schrijver <pdeschrijver@nvidia.com> | 2014-02-17 14:18:16 (GMT) |
| commit | 82ba1c3c9988a8055f4a4d7ca2168e9efe7e7874 (patch) | |
| tree | 0c9a829ca83489a35631d43e3f124bfcd35eb7d5 /firmware/e100 | |
| parent | 0e766c2d9fc8cd2ad0e0fe97ff4e264cb686fc32 (diff) | |
| download | linux-82ba1c3c9988a8055f4a4d7ca2168e9efe7e7874.tar.xz | |
clk: tegra: fix host1x clock on Tegra124
The host1x clock on Tegra124 is a 3-bit wide mux with 6 parents.
Change thte id to tegra_clk_host1x_8 so that the correct clock gets
registered.
Signed-off-by: Mark Zhang <markz@nvidia.com>
Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Diffstat (limited to 'firmware/e100')
0 files changed, 0 insertions, 0 deletions