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authorAdrian Bunk <bunk@stusta.de>2005-09-10 07:27:16 (GMT)
committerLinus Torvalds <torvalds@g5.osdl.org>2005-09-10 17:06:34 (GMT)
commite2afe67453e5b1499459ee3596b1e7924a5208f5 (patch)
treea5de215c0df3ecff145d829cfe350b96eb643720 /include/asm-i386/processor.h
parentea0e0a4f53a75ed9d0812352c0410f6fc2a0b62a (diff)
downloadlinux-e2afe67453e5b1499459ee3596b1e7924a5208f5.tar.xz
[PATCH] include/asm-i386/: "extern inline" -> "static inline"
"extern inline" doesn't make much sense. Signed-off-by: Adrian Bunk <bunk@stusta.de> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'include/asm-i386/processor.h')
-rw-r--r--include/asm-i386/processor.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/include/asm-i386/processor.h b/include/asm-i386/processor.h
index 37bef8e..0a4ec76 100644
--- a/include/asm-i386/processor.h
+++ b/include/asm-i386/processor.h
@@ -679,7 +679,7 @@ static inline void rep_nop(void)
However we don't do prefetches for pre XP Athlons currently
That should be fixed. */
#define ARCH_HAS_PREFETCH
-extern inline void prefetch(const void *x)
+static inline void prefetch(const void *x)
{
alternative_input(ASM_NOP4,
"prefetchnta (%1)",
@@ -693,7 +693,7 @@ extern inline void prefetch(const void *x)
/* 3dnow! prefetch to get an exclusive cache line. Useful for
spinlocks to avoid one state transition in the cache coherency protocol. */
-extern inline void prefetchw(const void *x)
+static inline void prefetchw(const void *x)
{
alternative_input(ASM_NOP4,
"prefetchw (%1)",