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author | Tony Luck <tony.luck@intel.com> | 2006-09-26 16:47:04 (GMT) |
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committer | Tony Luck <tony.luck@intel.com> | 2006-09-26 16:47:04 (GMT) |
commit | ae3e0218621db0590163b2d5c424ef1f340e3cc6 (patch) | |
tree | a7e84e4b4a1e32fb64a99d7d5c73420b717f01ae /include/asm-ia64/pal.h | |
parent | e478bec0ba0a83a48a0f6982934b6de079e7e6b3 (diff) | |
parent | 76d08bb3f09054edc45326ce5c698a3f6c45f5d0 (diff) | |
download | linux-ae3e0218621db0590163b2d5c424ef1f340e3cc6.tar.xz |
Pull model-name into release branch
Diffstat (limited to 'include/asm-ia64/pal.h')
-rw-r--r-- | include/asm-ia64/pal.h | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/include/asm-ia64/pal.h b/include/asm-ia64/pal.h index 20a8d61..d1587e4 100644 --- a/include/asm-ia64/pal.h +++ b/include/asm-ia64/pal.h @@ -78,6 +78,7 @@ #define PAL_VM_TR_READ 261 /* read contents of translation register */ #define PAL_GET_PSTATE 262 /* get the current P-state */ #define PAL_SET_PSTATE 263 /* set the P-state */ +#define PAL_BRAND_INFO 274 /* Processor branding information */ #ifndef __ASSEMBLY__ @@ -1133,6 +1134,15 @@ ia64_pal_set_pstate (u64 pstate_index) return iprv.status; } +/* Processor branding information*/ +static inline s64 +ia64_pal_get_brand_info (char *brand_info) +{ + struct ia64_pal_retval iprv; + PAL_CALL_STK(iprv, PAL_BRAND_INFO, 0, (u64)brand_info, 0); + return iprv.status; +} + /* Cause the processor to enter LIGHT HALT state, where prefetching and execution are * suspended, but cache and TLB coherency is maintained. */ |