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author | Timur Tabi <timur@freescale.com> | 2007-11-29 20:19:57 (GMT) |
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committer | Kumar Gala <galak@kernel.crashing.org> | 2007-12-11 19:57:18 (GMT) |
commit | c5eeb5599938acb9cda8ff1ef846a26cf70d46e0 (patch) | |
tree | 59b44cb4660cec9ed74e8623eca3e3e02e8705d4 /include/asm-powerpc/immap_86xx.h | |
parent | 41bad27ff7efff9a3fd131adabedb82204d8a9f2 (diff) | |
download | linux-c5eeb5599938acb9cda8ff1ef846a26cf70d46e0.tar.xz |
[POWERPC] 86xx: fix guts_set_dmacr() and add guts_set_pmuxcr_dma() to immap_86xx.h
Updated guts_set_dmacr() to enumerate the DMA controllers at 0, instead of 1,
so that it now matches other related functions. Added function
guts_set_pmuxcr_dma() to set the external DMA control bits in the PMUXCR
register of the global utilities structure.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'include/asm-powerpc/immap_86xx.h')
-rw-r--r-- | include/asm-powerpc/immap_86xx.h | 25 |
1 files changed, 23 insertions, 2 deletions
diff --git a/include/asm-powerpc/immap_86xx.h b/include/asm-powerpc/immap_86xx.h index 0ad4e65..0f165e5 100644 --- a/include/asm-powerpc/immap_86xx.h +++ b/include/asm-powerpc/immap_86xx.h @@ -89,14 +89,14 @@ struct ccsr_guts { * them. * * guts: Pointer to GUTS structure - * co: The DMA controller (1 or 2) + * co: The DMA controller (0 or 1) * ch: The channel on the DMA controller (0, 1, 2, or 3) * device: The device to set as the source (CCSR_GUTS_DMACR_DEV_xx) */ static inline void guts_set_dmacr(struct ccsr_guts __iomem *guts, unsigned int co, unsigned int ch, unsigned int device) { - unsigned int shift = 16 + (8 * (2 - co) + 2 * (3 - ch)); + unsigned int shift = 16 + (8 * (1 - co) + 2 * (3 - ch)); clrsetbits_be32(&guts->dmacr, 3 << shift, device << shift); } @@ -118,6 +118,27 @@ static inline void guts_set_dmacr(struct ccsr_guts __iomem *guts, #define CCSR_GUTS_PMUXCR_DMA1_0 0x00000002 #define CCSR_GUTS_PMUXCR_DMA1_3 0x00000001 +/* + * Set the DMA external control bits in the GUTS + * + * The DMA external control bits in the PMUXCR are only meaningful for + * channels 0 and 3. Any other channels are ignored. + * + * guts: Pointer to GUTS structure + * co: The DMA controller (0 or 1) + * ch: The channel on the DMA controller (0, 1, 2, or 3) + * value: the new value for the bit (0 or 1) + */ +static inline void guts_set_pmuxcr_dma(struct ccsr_guts __iomem *guts, + unsigned int co, unsigned int ch, unsigned int value) +{ + if ((ch == 0) || (ch == 3)) { + unsigned int shift = 2 * (co + 1) - (ch & 1) - 1; + + clrsetbits_be32(&guts->pmuxcr, 1 << shift, value << shift); + } +} + #define CCSR_GUTS_CLKDVDR_PXCKEN 0x80000000 #define CCSR_GUTS_CLKDVDR_SSICKEN 0x20000000 #define CCSR_GUTS_CLKDVDR_PXCKINV 0x10000000 |