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| author | Yinghai Lu <yhlu.kernel@gmail.com> | 2008-09-03 23:58:31 (GMT) |
|---|---|---|
| committer | Ingo Molnar <mingo@elte.hu> | 2008-10-16 14:53:04 (GMT) |
| commit | a11b5abef50722e42a7d13f6b799c4f606fcb797 (patch) | |
| tree | eed224f07b6c8fc20cc4a454578e34721999b763 /include/asm-x86 | |
| parent | c59d85a7b7822b83fc9783314543eea0ca860480 (diff) | |
| download | linux-a11b5abef50722e42a7d13f6b799c4f606fcb797.tar.xz | |
x2apic: fix reserved APIC register accesses in print_local_APIC()
APIC_ARBPRI is a reserved register for XAPIC and beyond.
APIC_RRR is a reserved register except for 82489DX, APIC for Pentium processors.
APIC_EOI is a write only register.
APIC_DFR is reserved in x2apic mode.
Access to these registers in x2apic will result in #GP fault. Fix these
apic register accesses.
Signed-off-by: Yinghai Lu <yhlu.kernel@gmail.com>
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
Cc: Maciej W. Rozycki <macro@linux-mips.org>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'include/asm-x86')
| -rw-r--r-- | include/asm-x86/apic.h | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/include/asm-x86/apic.h b/include/asm-x86/apic.h index 2d970f6..ef1d72d 100644 --- a/include/asm-x86/apic.h +++ b/include/asm-x86/apic.h @@ -98,6 +98,20 @@ extern void check_x2apic(void); extern void enable_x2apic(void); extern void enable_IR_x2apic(void); extern void x2apic_icr_write(u32 low, u32 id); +static inline int x2apic_enabled(void) +{ + int msr, msr2; + + if (!cpu_has_x2apic) + return 0; + + rdmsr(MSR_IA32_APICBASE, msr, msr2); + if (msr & X2APIC_ENABLE) + return 1; + return 0; +} +#else +#define x2apic_enabled() 0 #endif struct apic_ops { |