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| author | Arnd Bergmann <arnd@arndb.de> | 2014-05-23 21:30:17 (GMT) |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2014-05-23 21:49:07 (GMT) |
| commit | 4078679ecf93979adff211dd4a840d0956f2aa9f (patch) | |
| tree | 3e7fe9e9b22e421a257e587ebd7481061cc98f67 /include/dt-bindings | |
| parent | 77579afc35eeea20d3b34aad66dcbb6fdaf502da (diff) | |
| parent | 08f9234ad6b0b8bc51046346eabf5b92e631e62a (diff) | |
| download | linux-4078679ecf93979adff211dd4a840d0956f2aa9f.tar.xz | |
Merge tag 'qcom-dt-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/galak/linux-qcom into for-next
Merge "Qualcomm ARM Based Device Tree Updates for v3.16" from Kumar Gala:
* Added device tree nodes for pinctrl and SDHC for msm8974 SoC/DB8074 board
* Added binding spec for GSBI configuration node
* tag 'qcom-dt-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/galak/linux-qcom:
soc: qcom: Add device tree binding for GSBI
ARM: dts: msm: Add SDHC controller nodes for MSM8974 and DB8074 board
ARM: dts: MSM8974: Add pinctrl node
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'include/dt-bindings')
| -rw-r--r-- | include/dt-bindings/soc/qcom,gsbi.h | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/include/dt-bindings/soc/qcom,gsbi.h b/include/dt-bindings/soc/qcom,gsbi.h new file mode 100644 index 0000000..7ac4292 --- /dev/null +++ b/include/dt-bindings/soc/qcom,gsbi.h @@ -0,0 +1,26 @@ +/* Copyright (c) 2013, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ +#ifndef __DT_BINDINGS_QCOM_GSBI_H +#define __DT_BINDINGS_QCOM_GSBI_H + +#define GSBI_PROT_IDLE 0 +#define GSBI_PROT_I2C_UIM 1 +#define GSBI_PROT_I2C 2 +#define GSBI_PROT_SPI 3 +#define GSBI_PROT_UART_W_FC 4 +#define GSBI_PROT_UIM 5 +#define GSBI_PROT_I2C_UART 6 + +#define GSBI_CRCI_QUP 0 +#define GSBI_CRCI_UART 1 + +#endif |