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| author | Archit Taneja <archit@ti.com> | 2012-06-28 05:45:51 (GMT) |
|---|---|---|
| committer | Tomi Valkeinen <tomi.valkeinen@ti.com> | 2012-06-29 07:15:52 (GMT) |
| commit | 23c8f88e8a140c8435658c369b26c7b60d8fe3c0 (patch) | |
| tree | f4a454c8f17f9c10e055a8003bb1a2e89838523c /include/video | |
| parent | 07fb51c6bda74210b57a06e6dc901a6b0f04c09a (diff) | |
| download | linux-23c8f88e8a140c8435658c369b26c7b60d8fe3c0.tar.xz | |
OMAPDSS: Add interlace parameter to omap_video_timings
Add a parameter called interlace which tells whether the timings are in
interlaced or progressive mode. This aligns the omap_video_timings struct with
the Xorg modeline configuration.
It also removes the hack needed to write to divide the manager height by 2 if
the connected interface is VENC.
Signed-off-by: Archit Taneja <archit@ti.com>
Diffstat (limited to 'include/video')
| -rw-r--r-- | include/video/omapdss.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/include/video/omapdss.h b/include/video/omapdss.h index 14f261b..d8ab944 100644 --- a/include/video/omapdss.h +++ b/include/video/omapdss.h @@ -344,6 +344,8 @@ struct omap_video_timings { enum omap_dss_signal_level vsync_level; /* Hsync logic level */ enum omap_dss_signal_level hsync_level; + /* Interlaced or Progressive timings */ + bool interlace; /* Pixel clock edge to drive LCD data */ enum omap_dss_signal_edge data_pclk_edge; /* Data enable logic level */ |