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| author | Bjorn Helgaas <bhelgaas@google.com> | 2016-03-15 13:56:28 (GMT) |
|---|---|---|
| committer | Bjorn Helgaas <bhelgaas@google.com> | 2016-03-15 13:56:28 (GMT) |
| commit | 6e6f498b039aa5558c7377fbbe65f7421d34cea4 (patch) | |
| tree | 7425c95a17f779b1ecb03810bbfe24cab6387f48 /include | |
| parent | cfeb8139a1fbbbae3f1e986133f4e9e7833eeac4 (diff) | |
| parent | bd5174dfb6f171fa06e638664ec6ee54692cf7b2 (diff) | |
| download | linux-6e6f498b039aa5558c7377fbbe65f7421d34cea4.tar.xz | |
Merge branch 'pci/resource' into next
* pci/resource:
PCI: Simplify pci_create_attr() control flow
PCI: Don't leak memory if sysfs_create_bin_file() fails
PCI: Simplify sysfs ROM cleanup
PCI: Remove unused IORESOURCE_ROM_COPY and IORESOURCE_ROM_BIOS_COPY
MIPS: Loongson 3: Keep CPU physical (not virtual) addresses in shadow ROM resource
MIPS: Loongson 3: Use temporary struct resource * to avoid repetition
ia64/PCI: Keep CPU physical (not virtual) addresses in shadow ROM resource
ia64/PCI: Use ioremap() instead of open-coded equivalent
ia64/PCI: Use temporary struct resource * to avoid repetition
PCI: Clean up pci_map_rom() whitespace
PCI: Remove arch-specific IORESOURCE_ROM_SHADOW size from sysfs
PCI: Set ROM shadow location in arch code, not in PCI core
PCI: Don't enable/disable ROM BAR if we're using a RAM shadow copy
PCI: Don't assign or reassign immutable resources
PCI: Mark shadow copy of VGA ROM as IORESOURCE_PCI_FIXED
x86/PCI: Mark Broadwell-EP Home Agent & PCU as having non-compliant BARs
PCI: Disable IO/MEM decoding for devices with non-compliant BARs
Diffstat (limited to 'include')
| -rw-r--r-- | include/linux/ioport.h | 4 | ||||
| -rw-r--r-- | include/linux/pci.h | 1 |
2 files changed, 2 insertions, 3 deletions
diff --git a/include/linux/ioport.h b/include/linux/ioport.h index 24bea08..29a6deb 100644 --- a/include/linux/ioport.h +++ b/include/linux/ioport.h @@ -98,9 +98,7 @@ struct resource { /* PCI ROM control bits (IORESOURCE_BITS) */ #define IORESOURCE_ROM_ENABLE (1<<0) /* ROM is enabled, same as PCI_ROM_ADDRESS_ENABLE */ -#define IORESOURCE_ROM_SHADOW (1<<1) /* ROM is copy at C000:0 */ -#define IORESOURCE_ROM_COPY (1<<2) /* ROM is alloc'd copy, resource field overlaid */ -#define IORESOURCE_ROM_BIOS_COPY (1<<3) /* ROM is BIOS copy, resource field overlaid */ +#define IORESOURCE_ROM_SHADOW (1<<1) /* Use RAM image, not ROM BAR */ /* PCI control bits. Shares IORESOURCE_BITS with above PCI ROM. */ #define IORESOURCE_PCI_FIXED (1<<4) /* Do not move resource */ diff --git a/include/linux/pci.h b/include/linux/pci.h index bd757f3..15f466e 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -353,6 +353,7 @@ struct pci_dev { unsigned int io_window_1k:1; /* Intel P2P bridge 1K I/O windows */ unsigned int irq_managed:1; unsigned int has_secondary_link:1; + unsigned int non_compliant_bars:1; /* broken BARs; ignore them */ pci_dev_flags_t dev_flags; atomic_t enable_cnt; /* pci_enable_device has been called */ |