diff options
| author | Rusty Russell <rusty@rustcorp.com.au> | 2007-07-17 13:37:17 (GMT) |
|---|---|---|
| committer | Avi Kivity <avi@qumranet.com> | 2007-10-13 08:18:19 (GMT) |
| commit | 7075bc816cfad142da92207ed5a6f3da55b143ef (patch) | |
| tree | d7b7581a9968d89fac5587d2378390b5939d28ec /include | |
| parent | 8fc0d085f521a2a76418f8f569cf1cd27f0e43d4 (diff) | |
| download | linux-7075bc816cfad142da92207ed5a6f3da55b143ef.tar.xz | |
KVM: Use standard CR8 flags, and fix TPR definition
Intel manual (and KVM definition) say the TPR is 4 bits wide. Also fix
CR8_RESEVED_BITS typo.
Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
Acked-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Avi Kivity <avi@qumranet.com>
Diffstat (limited to 'include')
| -rw-r--r-- | include/asm-x86/processor-flags.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/include/asm-x86/processor-flags.h b/include/asm-x86/processor-flags.h index 5404e90..199cab1 100644 --- a/include/asm-x86/processor-flags.h +++ b/include/asm-x86/processor-flags.h @@ -63,7 +63,7 @@ /* * x86-64 Task Priority Register, CR8 */ -#define X86_CR8_TPR 0x00000007 /* task priority register */ +#define X86_CR8_TPR 0x0000000F /* task priority register */ /* * AMD and Transmeta use MSRs for configuration; see <asm/msr-index.h> |