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author | Linus Torvalds <torvalds@g5.osdl.org> | 2006-03-30 23:04:13 (GMT) |
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committer | Linus Torvalds <torvalds@g5.osdl.org> | 2006-03-30 23:04:13 (GMT) |
commit | ce362c009250340358a7221f3cdb7954cbf19c01 (patch) | |
tree | 38b4700e51d3cce214690e7882069e0e12abf8d4 /include | |
parent | 064c94f9da8845f12446ab37142aa10f3c6f66ac (diff) | |
parent | cd7a9202a5a6e7712df2b80ed5ebd7b078130fc3 (diff) | |
download | linux-ce362c009250340358a7221f3cdb7954cbf19c01.tar.xz |
Merge git://git.kernel.org/pub/scm/linux/kernel/git/kyle/parisc-2.6
* git://git.kernel.org/pub/scm/linux/kernel/git/kyle/parisc-2.6: (24 commits)
[PARISC] Fix double free when removing HIL drivers
[PARISC] Add atomic_sub_and_test
[PARISC] Enabled some NLS modules in a500, b180 and c3000 defconfigs
[PARISC] Kill duplicated EXPORT_SYMBOL warnings
[PARISC] Move ioremap EXPORT_SYMBOL from parisc_ksyms.c
[PARISC] Make local_t use atomic_long_t
[PARISC] Update defconfigs
[PARISC] Add PREEMPT support
[PARISC] More useful readwrite lock helpers
[PARISC] Convert HIL drivers to use input_allocate_device
[PARISC] Fixup CONFIG_EISA a bit
[PARISC] getsockopt should be ENTRY_COMP
[PARISC] Remove obsolete CONFIG_DEBUG_IOREMAP
[PARISC] Temporary FIXME for ioremapping EISA regions
[PARISC] Enable ioremap functionality unconditionally
[PARISC] Fix stifb with IOREMAP and a 64-bit kernel
[PARISC] Add CONFIG_HPPA_IOREMAP to conditionally enable ioremap
[PARISC] Add STRICT_MM_TYPECHECKS
[PARISC] Fix IOREMAP with a 64-bit kernel
[PARISC] Add parisc implementation of flush_kernel_dcache_page()
...
Diffstat (limited to 'include')
-rw-r--r-- | include/asm-parisc/atomic.h | 3 | ||||
-rw-r--r-- | include/asm-parisc/cache.h | 2 | ||||
-rw-r--r-- | include/asm-parisc/cacheflush.h | 17 | ||||
-rw-r--r-- | include/asm-parisc/io.h | 95 | ||||
-rw-r--r-- | include/asm-parisc/local.h | 16 | ||||
-rw-r--r-- | include/asm-parisc/page.h | 58 | ||||
-rw-r--r-- | include/asm-parisc/pci.h | 5 | ||||
-rw-r--r-- | include/asm-parisc/pdc_chassis.h | 5 | ||||
-rw-r--r-- | include/asm-parisc/spinlock.h | 16 | ||||
-rw-r--r-- | include/asm-parisc/thread_info.h | 3 |
10 files changed, 90 insertions, 130 deletions
diff --git a/include/asm-parisc/atomic.h b/include/asm-parisc/atomic.h index 4dc7253..403ea97 100644 --- a/include/asm-parisc/atomic.h +++ b/include/asm-parisc/atomic.h @@ -210,6 +210,8 @@ static __inline__ int atomic_read(const atomic_t *v) #define atomic_dec_and_test(v) (atomic_dec_return(v) == 0) +#define atomic_sub_and_test(i,v) (atomic_sub_return((i),(v)) == 0) + #define ATOMIC_INIT(i) ((atomic_t) { (i) }) #define smp_mb__before_atomic_dec() smp_mb() @@ -267,6 +269,7 @@ atomic64_read(const atomic64_t *v) #define atomic64_inc_and_test(v) (atomic64_inc_return(v) == 0) #define atomic64_dec_and_test(v) (atomic64_dec_return(v) == 0) +#define atomic64_sub_and_test(i,v) (atomic64_sub_return((i),(v)) == 0) #endif /* __LP64__ */ diff --git a/include/asm-parisc/cache.h b/include/asm-parisc/cache.h index ae50f8e..c831665 100644 --- a/include/asm-parisc/cache.h +++ b/include/asm-parisc/cache.h @@ -48,7 +48,7 @@ extern void flush_user_icache_range_asm(unsigned long, unsigned long); extern void flush_kernel_icache_range_asm(unsigned long, unsigned long); extern void flush_user_dcache_range_asm(unsigned long, unsigned long); extern void flush_kernel_dcache_range_asm(unsigned long, unsigned long); -extern void flush_kernel_dcache_page(void *); +extern void flush_kernel_dcache_page_asm(void *); extern void flush_kernel_icache_page(void *); extern void disable_sr_hashing(void); /* turns off space register hashing */ extern void disable_sr_hashing_asm(int); /* low level support for above */ diff --git a/include/asm-parisc/cacheflush.h b/include/asm-parisc/cacheflush.h index c53af9f..76b6b7d 100644 --- a/include/asm-parisc/cacheflush.h +++ b/include/asm-parisc/cacheflush.h @@ -62,7 +62,7 @@ extern void flush_dcache_page(struct page *page); #define flush_dcache_mmap_unlock(mapping) \ write_unlock_irq(&(mapping)->tree_lock) -#define flush_icache_page(vma,page) do { flush_kernel_dcache_page(page_address(page)); flush_kernel_icache_page(page_address(page)); } while (0) +#define flush_icache_page(vma,page) do { flush_kernel_dcache_page(page); flush_kernel_icache_page(page_address(page)); } while (0) #define flush_icache_range(s,e) do { flush_kernel_dcache_range_asm(s,e); flush_kernel_icache_range_asm(s,e); } while (0) @@ -184,6 +184,21 @@ flush_cache_page(struct vm_area_struct *vma, unsigned long vmaddr, unsigned long } +static inline void +flush_anon_page(struct page *page, unsigned long vmaddr) +{ + if (PageAnon(page)) + flush_user_dcache_page(vmaddr); +} +#define ARCH_HAS_FLUSH_ANON_PAGE + +static inline void +flush_kernel_dcache_page(struct page *page) +{ + flush_kernel_dcache_page_asm(page_address(page)); +} +#define ARCH_HAS_FLUSH_KERNEL_DCACHE_PAGE + #ifdef CONFIG_DEBUG_RODATA void mark_rodata_ro(void); #endif diff --git a/include/asm-parisc/io.h b/include/asm-parisc/io.h index be0c723..29da3119 100644 --- a/include/asm-parisc/io.h +++ b/include/asm-parisc/io.h @@ -25,35 +25,11 @@ extern unsigned long parisc_vmerge_max_size; * eg dev->hpa or 0xfee00000. */ -#ifdef CONFIG_DEBUG_IOREMAP -#ifdef CONFIG_64BIT -#define NYBBLE_SHIFT 60 -#else -#define NYBBLE_SHIFT 28 -#endif -extern void gsc_bad_addr(unsigned long addr); -extern void __raw_bad_addr(const volatile void __iomem *addr); -#define gsc_check_addr(addr) \ - if ((addr >> NYBBLE_SHIFT) != 0xf) { \ - gsc_bad_addr(addr); \ - addr |= 0xfUL << NYBBLE_SHIFT; \ - } -#define __raw_check_addr(addr) \ - if (((unsigned long)addr >> NYBBLE_SHIFT) != 0xe) \ - __raw_bad_addr(addr); \ - addr = (void __iomem *)((unsigned long)addr | (0xfUL << NYBBLE_SHIFT)); -#else -#define gsc_check_addr(addr) -#define __raw_check_addr(addr) -#endif - static inline unsigned char gsc_readb(unsigned long addr) { long flags; unsigned char ret; - gsc_check_addr(addr); - __asm__ __volatile__( " rsm 2,%0\n" " ldbx 0(%2),%1\n" @@ -68,8 +44,6 @@ static inline unsigned short gsc_readw(unsigned long addr) long flags; unsigned short ret; - gsc_check_addr(addr); - __asm__ __volatile__( " rsm 2,%0\n" " ldhx 0(%2),%1\n" @@ -83,8 +57,6 @@ static inline unsigned int gsc_readl(unsigned long addr) { u32 ret; - gsc_check_addr(addr); - __asm__ __volatile__( " ldwax 0(%1),%0\n" : "=r" (ret) : "r" (addr) ); @@ -95,7 +67,6 @@ static inline unsigned int gsc_readl(unsigned long addr) static inline unsigned long long gsc_readq(unsigned long addr) { unsigned long long ret; - gsc_check_addr(addr); #ifdef __LP64__ __asm__ __volatile__( @@ -112,8 +83,6 @@ static inline unsigned long long gsc_readq(unsigned long addr) static inline void gsc_writeb(unsigned char val, unsigned long addr) { long flags; - gsc_check_addr(addr); - __asm__ __volatile__( " rsm 2,%0\n" " stbs %1,0(%2)\n" @@ -124,8 +93,6 @@ static inline void gsc_writeb(unsigned char val, unsigned long addr) static inline void gsc_writew(unsigned short val, unsigned long addr) { long flags; - gsc_check_addr(addr); - __asm__ __volatile__( " rsm 2,%0\n" " sths %1,0(%2)\n" @@ -135,8 +102,6 @@ static inline void gsc_writew(unsigned short val, unsigned long addr) static inline void gsc_writel(unsigned int val, unsigned long addr) { - gsc_check_addr(addr); - __asm__ __volatile__( " stwas %0,0(%1)\n" : : "r" (val), "r" (addr) ); @@ -144,8 +109,6 @@ static inline void gsc_writel(unsigned int val, unsigned long addr) static inline void gsc_writeq(unsigned long long val, unsigned long addr) { - gsc_check_addr(addr); - #ifdef __LP64__ __asm__ __volatile__( " stda %0,0(%1)\n" @@ -180,14 +143,7 @@ extern inline void * ioremap_nocache(unsigned long offset, unsigned long size) extern void iounmap(void __iomem *addr); -/* - * USE_HPPA_IOREMAP is the magic flag to enable or disable real ioremap() - * functionality. It's currently disabled because it may not work on some - * machines. - */ -#define USE_HPPA_IOREMAP 0 -#if USE_HPPA_IOREMAP static inline unsigned char __raw_readb(const volatile void __iomem *addr) { return (*(volatile unsigned char __force *) (addr)); @@ -221,57 +177,6 @@ static inline void __raw_writeq(unsigned long long b, volatile void __iomem *add { *(volatile unsigned long long __force *) addr = b; } -#else /* !USE_HPPA_IOREMAP */ -static inline unsigned char __raw_readb(const volatile void __iomem *addr) -{ - __raw_check_addr(addr); - - return gsc_readb((unsigned long) addr); -} -static inline unsigned short __raw_readw(const volatile void __iomem *addr) -{ - __raw_check_addr(addr); - - return gsc_readw((unsigned long) addr); -} -static inline unsigned int __raw_readl(const volatile void __iomem *addr) -{ - __raw_check_addr(addr); - - return gsc_readl((unsigned long) addr); -} -static inline unsigned long long __raw_readq(const volatile void __iomem *addr) -{ - __raw_check_addr(addr); - - return gsc_readq((unsigned long) addr); -} - -static inline void __raw_writeb(unsigned char b, volatile void __iomem *addr) -{ - __raw_check_addr(addr); - - gsc_writeb(b, (unsigned long) addr); -} -static inline void __raw_writew(unsigned short b, volatile void __iomem *addr) -{ - __raw_check_addr(addr); - - gsc_writew(b, (unsigned long) addr); -} -static inline void __raw_writel(unsigned int b, volatile void __iomem *addr) -{ - __raw_check_addr(addr); - - gsc_writel(b, (unsigned long) addr); -} -static inline void __raw_writeq(unsigned long long b, volatile void __iomem *addr) -{ - __raw_check_addr(addr); - - gsc_writeq(b, (unsigned long) addr); -} -#endif /* !USE_HPPA_IOREMAP */ /* readb can never be const, so use __fswab instead of le*_to_cpu */ #define readb(addr) __raw_readb(addr) diff --git a/include/asm-parisc/local.h b/include/asm-parisc/local.h index 892b3b2..d0f5509 100644 --- a/include/asm-parisc/local.h +++ b/include/asm-parisc/local.h @@ -4,16 +4,16 @@ #include <linux/percpu.h> #include <asm/atomic.h> -typedef atomic_t local_t; +typedef atomic_long_t local_t; -#define LOCAL_INIT(i) ATOMIC_INIT(i) -#define local_read(v) atomic_read(v) -#define local_set(v,i) atomic_set(v,i) +#define LOCAL_INIT(i) ATOMIC_LONG_INIT(i) +#define local_read(v) atomic_long_read(v) +#define local_set(v,i) atomic_long_set(v,i) -#define local_inc(v) atomic_inc(v) -#define local_dec(v) atomic_dec(v) -#define local_add(i, v) atomic_add(i, v) -#define local_sub(i, v) atomic_sub(i, v) +#define local_inc(v) atomic_long_inc(v) +#define local_dec(v) atomic_long_dec(v) +#define local_add(i, v) atomic_long_add(i, v) +#define local_sub(i, v) atomic_long_sub(i, v) #define __local_inc(v) ((v)->counter++) #define __local_dec(v) ((v)->counter--) diff --git a/include/asm-parisc/page.h b/include/asm-parisc/page.h index 9f303c0..45e02aa 100644 --- a/include/asm-parisc/page.h +++ b/include/asm-parisc/page.h @@ -26,7 +26,7 @@ static inline void copy_user_page(void *vto, void *vfrom, unsigned long vaddr, struct page *pg) { copy_user_page_asm(vto, vfrom); - flush_kernel_dcache_page(vto); + flush_kernel_dcache_page_asm(vto); /* XXX: ppc flushes icache too, should we? */ } @@ -40,14 +40,19 @@ clear_user_page(void *page, unsigned long vaddr, struct page *pg) /* * These are used to make use of C type-checking.. */ -#ifdef __LP64__ -typedef struct { unsigned long pte; } pte_t; -#else -typedef struct { - unsigned long pte; - unsigned long flags; -} pte_t; +#define STRICT_MM_TYPECHECKS +#ifdef STRICT_MM_TYPECHECKS +typedef struct { unsigned long pte; +#if !defined(CONFIG_64BIT) + unsigned long future_flags; + /* XXX: it's possible to remove future_flags and change BITS_PER_PTE_ENTRY + to 2, but then strangely the identical 32bit kernel boots on a + c3000(pa20), but not any longer on a 715(pa11). + Still investigating... HelgeD. + */ #endif +} pte_t; /* either 32 or 64bit */ + /* NOTE: even on 64 bits, these entries are __u32 because we allocate * the pmd and pgd in ZONE_DMA (i.e. under 4GB) */ typedef struct { __u32 pmd; } pmd_t; @@ -55,25 +60,44 @@ typedef struct { __u32 pgd; } pgd_t; typedef struct { unsigned long pgprot; } pgprot_t; #define pte_val(x) ((x).pte) -#ifdef __LP64__ -#define pte_flags(x) (*(__u32 *)&((x).pte)) -#else -#define pte_flags(x) ((x).flags) -#endif - /* These do not work lvalues, so make sure we don't use them as such. */ #define pmd_val(x) ((x).pmd + 0) #define pgd_val(x) ((x).pgd + 0) #define pgprot_val(x) ((x).pgprot) -#define __pmd_val_set(x,n) (x).pmd = (n) -#define __pgd_val_set(x,n) (x).pgd = (n) - #define __pte(x) ((pte_t) { (x) } ) #define __pmd(x) ((pmd_t) { (x) } ) #define __pgd(x) ((pgd_t) { (x) } ) #define __pgprot(x) ((pgprot_t) { (x) } ) +#define __pmd_val_set(x,n) (x).pmd = (n) +#define __pgd_val_set(x,n) (x).pgd = (n) + +#else +/* + * .. while these make it easier on the compiler + */ +typedef unsigned long pte_t; +typedef __u32 pmd_t; +typedef __u32 pgd_t; +typedef unsigned long pgprot_t; + +#define pte_val(x) (x) +#define pmd_val(x) (x) +#define pgd_val(x) (x) +#define pgprot_val(x) (x) + +#define __pte(x) (x) +#define __pmd(x) (x) +#define __pgd(x) (x) +#define __pgprot(x) (x) + +#define __pmd_val_set(x,n) (x) = (n) +#define __pgd_val_set(x,n) (x) = (n) + +#endif /* STRICT_MM_TYPECHECKS */ + + typedef struct __physmem_range { unsigned long start_pfn; unsigned long pages; /* PAGE_SIZE pages */ diff --git a/include/asm-parisc/pci.h b/include/asm-parisc/pci.h index fe7f6a2..77bbafb 100644 --- a/include/asm-parisc/pci.h +++ b/include/asm-parisc/pci.h @@ -289,4 +289,9 @@ static inline void pcibios_add_platform_entries(struct pci_dev *dev) { } +static inline void pcibios_penalize_isa_irq(int irq, int active) +{ + /* We don't need to penalize isa irq's */ +} + #endif /* __ASM_PARISC_PCI_H */ diff --git a/include/asm-parisc/pdc_chassis.h b/include/asm-parisc/pdc_chassis.h index adac9ac..a609273 100644 --- a/include/asm-parisc/pdc_chassis.h +++ b/include/asm-parisc/pdc_chassis.h @@ -6,9 +6,8 @@ * * * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2, or (at your option) - * any later version. + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of diff --git a/include/asm-parisc/spinlock.h b/include/asm-parisc/spinlock.h index 16c2ac0..a93960e 100644 --- a/include/asm-parisc/spinlock.h +++ b/include/asm-parisc/spinlock.h @@ -134,14 +134,22 @@ static __inline__ int __raw_write_trylock(raw_rwlock_t *rw) return 1; } -static __inline__ int __raw_is_read_locked(raw_rwlock_t *rw) +/* + * read_can_lock - would read_trylock() succeed? + * @lock: the rwlock in question. + */ +static __inline__ int __raw_read_can_lock(raw_rwlock_t *rw) { - return rw->counter > 0; + return rw->counter >= 0; } -static __inline__ int __raw_is_write_locked(raw_rwlock_t *rw) +/* + * write_can_lock - would write_trylock() succeed? + * @lock: the rwlock in question. + */ +static __inline__ int __raw_write_can_lock(raw_rwlock_t *rw) { - return rw->counter < 0; + return !rw->counter; } #endif /* __ASM_SPINLOCK_H */ diff --git a/include/asm-parisc/thread_info.h b/include/asm-parisc/thread_info.h index ac32f14..f2f83b0 100644 --- a/include/asm-parisc/thread_info.h +++ b/include/asm-parisc/thread_info.h @@ -49,7 +49,8 @@ struct thread_info { #endif /* !__ASSEMBLY */ -#define PREEMPT_ACTIVE 0x10000000 +#define PREEMPT_ACTIVE_BIT 28 +#define PREEMPT_ACTIVE (1 << PREEMPT_ACTIVE_BIT) /* * thread information flags |