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authorLinus Torvalds <torvalds@linux-foundation.org>2008-05-05 00:07:28 (GMT)
committerLinus Torvalds <torvalds@linux-foundation.org>2008-05-05 00:07:28 (GMT)
commit8dcf5782848600ecfd0df3a45c521b5ad0fcb42e (patch)
tree72821491c1ca5b0660599b4c06a27770d6800cd3 /include
parente73b65f1db7e3baa3db43951476b7d2d2381ba35 (diff)
parentb8ba5f10c5956d2b297766fda8f4f5ab8ad1e2cc (diff)
downloadlinux-8dcf5782848600ecfd0df3a45c521b5ad0fcb42e.tar.xz
Merge branch 'kvm-updates-2.6.26' of git://git.kernel.org/pub/scm/linux/kernel/git/avi/kvm
* 'kvm-updates-2.6.26' of git://git.kernel.org/pub/scm/linux/kernel/git/avi/kvm: x86: KVM geust: make setup_secondary_clock definition dependent on local apic KVM: MMU: Allow more than PAGES_PER_HPAGE write protections per large page KVM: avoid fx_init() schedule in atomic KVM: Avoid spurious execeptions after setting registers KVM: PIT: support mode 4 KVM: x86 emulator: disable writeback on lmsw KVM: ppc: deliver INTERRUPT_FP_UNAVAIL to the guest KVM: ppc: Handle guest idle by emulating MSR[WE] writes KVM: x86: task switch: fix wrong bit setting for the busy flag KVM: VMX: Enable EPT feature for KVM KVM: VMX: Prepare an identity page table for EPT in real mode KVM: Export necessary function for EPT KVM: MMU: Remove #ifdef CONFIG_X86_64 to support 4 level EPT KVM: MMU: Add EPT support KVM: Add kvm_x86_ops get_tdp_level() KVM: MMU: Move some definitions to a header file KVM: VMX: EPT Feature Detection
Diffstat (limited to 'include')
-rw-r--r--include/asm-powerpc/kvm_host.h1
-rw-r--r--include/asm-powerpc/kvm_ppc.h5
-rw-r--r--include/asm-x86/kvm_host.h10
3 files changed, 15 insertions, 1 deletions
diff --git a/include/asm-powerpc/kvm_host.h b/include/asm-powerpc/kvm_host.h
index 04ffbb8..81a69d7 100644
--- a/include/asm-powerpc/kvm_host.h
+++ b/include/asm-powerpc/kvm_host.h
@@ -59,6 +59,7 @@ struct kvm_vcpu_stat {
u32 emulated_inst_exits;
u32 dec_exits;
u32 ext_intr_exits;
+ u32 halt_wakeup;
};
struct tlbe {
diff --git a/include/asm-powerpc/kvm_ppc.h b/include/asm-powerpc/kvm_ppc.h
index 7ac8203..b35a7e3 100644
--- a/include/asm-powerpc/kvm_ppc.h
+++ b/include/asm-powerpc/kvm_ppc.h
@@ -77,12 +77,17 @@ static inline void kvmppc_clear_exception(struct kvm_vcpu *vcpu, int exception)
clear_bit(priority, &vcpu->arch.pending_exceptions);
}
+/* Helper function for "full" MSR writes. No need to call this if only EE is
+ * changing. */
static inline void kvmppc_set_msr(struct kvm_vcpu *vcpu, u32 new_msr)
{
if ((new_msr & MSR_PR) != (vcpu->arch.msr & MSR_PR))
kvmppc_mmu_priv_switch(vcpu, new_msr & MSR_PR);
vcpu->arch.msr = new_msr;
+
+ if (vcpu->arch.msr & MSR_WE)
+ kvm_vcpu_block(vcpu);
}
#endif /* __POWERPC_KVM_PPC_H__ */
diff --git a/include/asm-x86/kvm_host.h b/include/asm-x86/kvm_host.h
index 9d963cd..1d8cd01 100644
--- a/include/asm-x86/kvm_host.h
+++ b/include/asm-x86/kvm_host.h
@@ -314,6 +314,9 @@ struct kvm_arch{
struct page *apic_access_page;
gpa_t wall_clock;
+
+ struct page *ept_identity_pagetable;
+ bool ept_identity_pagetable_done;
};
struct kvm_vm_stat {
@@ -422,6 +425,7 @@ struct kvm_x86_ops {
struct kvm_run *run);
int (*set_tss_addr)(struct kvm *kvm, unsigned int addr);
+ int (*get_tdp_level)(void);
};
extern struct kvm_x86_ops *kvm_x86_ops;
@@ -433,6 +437,9 @@ void kvm_mmu_destroy(struct kvm_vcpu *vcpu);
int kvm_mmu_create(struct kvm_vcpu *vcpu);
int kvm_mmu_setup(struct kvm_vcpu *vcpu);
void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte);
+void kvm_mmu_set_base_ptes(u64 base_pte);
+void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
+ u64 dirty_mask, u64 nx_mask, u64 x_mask);
int kvm_mmu_reset_context(struct kvm_vcpu *vcpu);
void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot);
@@ -620,7 +627,7 @@ static inline void fx_restore(struct i387_fxsave_struct *image)
asm("fxrstor (%0)":: "r" (image));
}
-static inline void fpu_init(void)
+static inline void fx_finit(void)
{
asm("finit");
}
@@ -644,6 +651,7 @@ static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code)
#define ASM_VMX_VMWRITE_RSP_RDX ".byte 0x0f, 0x79, 0xd4"
#define ASM_VMX_VMXOFF ".byte 0x0f, 0x01, 0xc4"
#define ASM_VMX_VMXON_RAX ".byte 0xf3, 0x0f, 0xc7, 0x30"
+#define ASM_VMX_INVEPT ".byte 0x66, 0x0f, 0x38, 0x80, 0x08"
#define ASM_VMX_INVVPID ".byte 0x66, 0x0f, 0x38, 0x81, 0x08"
#define MSR_IA32_TIME_STAMP_COUNTER 0x010