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authorPeter Zijlstra <a.p.zijlstra@chello.nl>2010-03-03 11:02:30 (GMT)
committerIngo Molnar <mingo@elte.hu>2010-03-10 12:23:32 (GMT)
commitcaff2befffe899e63df5cc760b7ed01cfd902685 (patch)
treefe07f997bd67d1e5ae3122db789d7e7361ddca28 /include
parent69fef0d2e2c2c049ef4207a52e78b50d527bd85a (diff)
downloadlinux-caff2befffe899e63df5cc760b7ed01cfd902685.tar.xz
perf, x86: Implement simple LBR support
Implement simple suport Intel Last-Branch-Record, it supports all hardware that implements FREEZE_LBRS_ON_PMI, but does not (yet) implement the LBR config register. The Intel LBR is a FIFO of From,To addresses describing the last few branches the hardware took. This patch does not add perf interface to the LBR, but merely provides an interface for internal use. Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: Arnaldo Carvalho de Melo <acme@infradead.org> Cc: paulus@samba.org Cc: eranian@google.com Cc: robert.richter@amd.com Cc: fweisbec@gmail.com LKML-Reference: <20100304140100.544191154@chello.nl> Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'include')
-rw-r--r--include/linux/perf_event.h11
1 files changed, 11 insertions, 0 deletions
diff --git a/include/linux/perf_event.h b/include/linux/perf_event.h
index 42307b5..ab4fd9e 100644
--- a/include/linux/perf_event.h
+++ b/include/linux/perf_event.h
@@ -467,6 +467,17 @@ struct perf_raw_record {
void *data;
};
+struct perf_branch_entry {
+ __u64 from;
+ __u64 to;
+ __u64 flags;
+};
+
+struct perf_branch_stack {
+ __u64 nr;
+ struct perf_branch_entry entries[0];
+};
+
struct task_struct;
/**