diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2014-01-21 18:26:23 (GMT) |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2014-01-21 18:26:23 (GMT) |
commit | d4371f94bc003e912d4825f5c4bdf57959857073 (patch) | |
tree | 919e196d72fc83cba8c67ee720a233671938d265 /include | |
parent | a547df99aad777c1807e23991fa2471693c0e4cc (diff) | |
parent | 7552f34a790069a008bd3e2ab4c0954b30c2f63b (diff) | |
download | linux-d4371f94bc003e912d4825f5c4bdf57959857073.tar.xz |
Merge tag 'sound-3.14-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound
Pull sound updates from Takashi Iwai:
"It was holiday season, so no wonder that there are little changes in
framework level, although diffstat shows quite many changes spreaded
over sound/* directories. Most of changes are cleanups, code
refactoring and fixes.
Some highlights:
- Removal of OSS sleep_on usages by Arnd
- Simplified memalloc helper codes, drop obsoleted features; now it's
built into PCM driver instead of an individual module
- Warn if PCM buffer preallocation fails, which will show page
allocation issues more clearly
- Compress offload API updates for sample rates by Vinod
- PCM glitch workaround on ctxfi emu20k1 by Sarah
- Drop cs46xx DSP blobs, using firmware loader now
- USB-audio quitks for Plantronics Gamecom 780, Creative VF0420, and
Focusrite Saffire 6
HD-audio specifics:
- Standardize Kconfigs of HD-audio codec drivers; now "make
localmodconfig" recognizes configs properly (finally!)
- Parallel PM implementation by Mengdong
- BayleyBay/ValleyView2 board fixups
- Broadwell audio support
- Runtime PM improvement (PantherPoint, etc)
- Quirks: Dell subwooer, Gigabyte mobo jack detection oddity, Dell
AiO click noise fixes, Dell headset mic fixes, etc
- Automatic bind with HDMI codec parser without generic parser
- More AD codec fixes (since 3.12 regression) including the automatic
stereo mix support
- Common Thinkpad ACPI helper for Realtek and Conexant codecs
ASoC specifics:
- Update to the generic DMA code to support deferred probe and
managed resources
- New drivers for BCM2835 (used in Raspberry Pi), Tegra with MAX98090
and Analog Devices AXI I2S and S/PDIF controller IPs
- Device tree support for the simple card, max98090 and cs42l52
- Conversion of the Samsung drivers to native dmaengine, making them
multiplatform compatible and hopefully helping keep them more
modern and up to date.
- More regmap conversions, including a very welcome one for twl6040
from Peter Ujfalusi
- A big overhaul of the DaVinci drivers also from Peter Ujfalusi
- Lots of DMA updates from Lars-Peter
- Improvements to the constraints handling code from Lars-Peter
- A very helpful conversion of the TWL4030 driver to regmap from Peter
- A new driver for the Freescale ESAI controller from Nicolin Chen
- Conversion of some of the drivers to use params_width()
- Extensions to DPCM for use with compressed audio from Liam"
* tag 'sound-3.14-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound: (396 commits)
ASoC: dapm: Fix double prefix addition
ASoC: compress: Add suport for DPCM into compressed audio
ASoC: DPCM: make some DPCM API calls non static for compressed usage
ASoC: core: Fix possible NULL pointer dereference of pcm->config
ALSA: hda - add headset mic detect quirks for some Dell machines
ASoC: tlv320aic32x4: Fix regmap range_min
ASoC: core: Return -ENOTSUPP from set_sysclk() if no operation provided
ASoC: dapm: Change prototype of soc_widget_read
ASoC: samsung: Remove SND_DMAENGINE_PCM_FLAG_NO_RESIDUE flag
ASoC: axi-{spdif,i2s}: Remove SND_DMAENGINE_PCM_FLAG_NO_RESIDUE flag
ASoC: generic-dmaengine-pcm: Check DMA residue granularity
ASoC: generic-dmaengine-pcm: Check NO_RESIDUE flag at runtime
dma: pl330: Set residue_granularity
dma: Indicate residue granularity in dma_slave_caps
ASoC: simple-card: fix one bug to writing to the platform data
ASoC: pcm: Use snd_pcm_rate_mask_intersect() helper
ALSA: Add helper function for intersecting two rate masks
ASoC: s6000: Don't mix SNDRV_PCM_RATE_CONTINUOUS with specific rates
ASoC: fsl: Don't mix SNDRV_PCM_RATE_CONTINUOUS with specific rates
ASoC: pcm: Properly initialize hw->rate_max
...
Diffstat (limited to 'include')
-rw-r--r-- | include/linux/dmaengine.h | 36 | ||||
-rw-r--r-- | include/linux/i2c/twl.h | 5 | ||||
-rw-r--r-- | include/linux/mfd/arizona/registers.h | 189 | ||||
-rw-r--r-- | include/linux/platform_data/asoc-ti-mcbsp.h | 6 | ||||
-rw-r--r-- | include/linux/platform_data/asoc-ux500-msp.h | 9 | ||||
-rw-r--r-- | include/linux/platform_data/davinci_asp.h | 1 | ||||
-rw-r--r-- | include/sound/cs42l52.h | 14 | ||||
-rw-r--r-- | include/sound/dmaengine_pcm.h | 10 | ||||
-rw-r--r-- | include/sound/hda_verbs.h | 554 | ||||
-rw-r--r-- | include/sound/memalloc.h | 7 | ||||
-rw-r--r-- | include/sound/pcm.h | 3 | ||||
-rw-r--r-- | include/sound/pcm_params.h | 12 | ||||
-rw-r--r-- | include/sound/rcar_snd.h | 3 | ||||
-rw-r--r-- | include/sound/soc-dai.h | 8 | ||||
-rw-r--r-- | include/sound/soc-dapm.h | 1 | ||||
-rw-r--r-- | include/sound/soc-dpcm.h | 22 | ||||
-rw-r--r-- | include/sound/soc.h | 22 | ||||
-rw-r--r-- | include/sound/spear_dma.h | 1 | ||||
-rw-r--r-- | include/uapi/sound/compress_params.h | 10 |
19 files changed, 872 insertions, 41 deletions
diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h index 41cf0c3..ba5f96db 100644 --- a/include/linux/dmaengine.h +++ b/include/linux/dmaengine.h @@ -22,6 +22,7 @@ #define LINUX_DMAENGINE_H #include <linux/device.h> +#include <linux/err.h> #include <linux/uio.h> #include <linux/bug.h> #include <linux/scatterlist.h> @@ -363,6 +364,32 @@ struct dma_slave_config { unsigned int slave_id; }; +/** + * enum dma_residue_granularity - Granularity of the reported transfer residue + * @DMA_RESIDUE_GRANULARITY_DESCRIPTOR: Residue reporting is not support. The + * DMA channel is only able to tell whether a descriptor has been completed or + * not, which means residue reporting is not supported by this channel. The + * residue field of the dma_tx_state field will always be 0. + * @DMA_RESIDUE_GRANULARITY_SEGMENT: Residue is updated after each successfully + * completed segment of the transfer (For cyclic transfers this is after each + * period). This is typically implemented by having the hardware generate an + * interrupt after each transferred segment and then the drivers updates the + * outstanding residue by the size of the segment. Another possibility is if + * the hardware supports scatter-gather and the segment descriptor has a field + * which gets set after the segment has been completed. The driver then counts + * the number of segments without the flag set to compute the residue. + * @DMA_RESIDUE_GRANULARITY_BURST: Residue is updated after each transferred + * burst. This is typically only supported if the hardware has a progress + * register of some sort (E.g. a register with the current read/write address + * or a register with the amount of bursts/beats/bytes that have been + * transferred or still need to be transferred). + */ +enum dma_residue_granularity { + DMA_RESIDUE_GRANULARITY_DESCRIPTOR = 0, + DMA_RESIDUE_GRANULARITY_SEGMENT = 1, + DMA_RESIDUE_GRANULARITY_BURST = 2, +}; + /* struct dma_slave_caps - expose capabilities of a slave channel only * * @src_addr_widths: bit mask of src addr widths the channel supports @@ -373,6 +400,7 @@ struct dma_slave_config { * should be checked by controller as well * @cmd_pause: true, if pause and thereby resume is supported * @cmd_terminate: true, if terminate cmd is supported + * @residue_granularity: granularity of the reported transfer residue */ struct dma_slave_caps { u32 src_addr_widths; @@ -380,6 +408,7 @@ struct dma_slave_caps { u32 directions; bool cmd_pause; bool cmd_terminate; + enum dma_residue_granularity residue_granularity; }; static inline const char *dma_chan_name(struct dma_chan *chan) @@ -1040,6 +1069,8 @@ enum dma_status dma_wait_for_async_tx(struct dma_async_tx_descriptor *tx); void dma_issue_pending_all(void); struct dma_chan *__dma_request_channel(const dma_cap_mask_t *mask, dma_filter_fn fn, void *fn_param); +struct dma_chan *dma_request_slave_channel_reason(struct device *dev, + const char *name); struct dma_chan *dma_request_slave_channel(struct device *dev, const char *name); void dma_release_channel(struct dma_chan *chan); #else @@ -1063,6 +1094,11 @@ static inline struct dma_chan *__dma_request_channel(const dma_cap_mask_t *mask, { return NULL; } +static inline struct dma_chan *dma_request_slave_channel_reason( + struct device *dev, const char *name) +{ + return ERR_PTR(-ENODEV); +} static inline struct dma_chan *dma_request_slave_channel(struct device *dev, const char *name) { diff --git a/include/linux/i2c/twl.h b/include/linux/i2c/twl.h index 673a3ce..ade1c06 100644 --- a/include/linux/i2c/twl.h +++ b/include/linux/i2c/twl.h @@ -175,6 +175,9 @@ static inline int twl_class_is_ ##class(void) \ TWL_CLASS_IS(4030, TWL4030_CLASS_ID) TWL_CLASS_IS(6030, TWL6030_CLASS_ID) +/* Set the regcache bypass for the regmap associated with the nodule */ +int twl_set_regcache_bypass(u8 mod_no, bool enable); + /* * Read and write several 8-bit registers at once. */ @@ -667,8 +670,6 @@ struct twl4030_codec_data { unsigned int digimic_delay; /* in ms */ unsigned int ramp_delay_value; unsigned int offset_cncl_path; - unsigned int check_defaults:1; - unsigned int reset_registers:1; unsigned int hs_extmute:1; int hs_extmute_gpio; }; diff --git a/include/linux/mfd/arizona/registers.h b/include/linux/mfd/arizona/registers.h index b319765..fdf3aa3 100644 --- a/include/linux/mfd/arizona/registers.h +++ b/include/linux/mfd/arizona/registers.h @@ -139,6 +139,7 @@ #define ARIZONA_INPUT_ENABLES_STATUS 0x301 #define ARIZONA_INPUT_RATE 0x308 #define ARIZONA_INPUT_VOLUME_RAMP 0x309 +#define ARIZONA_HPF_CONTROL 0x30C #define ARIZONA_IN1L_CONTROL 0x310 #define ARIZONA_ADC_DIGITAL_VOLUME_1L 0x311 #define ARIZONA_DMIC1L_CONTROL 0x312 @@ -160,6 +161,7 @@ #define ARIZONA_IN4L_CONTROL 0x328 #define ARIZONA_ADC_DIGITAL_VOLUME_4L 0x329 #define ARIZONA_DMIC4L_CONTROL 0x32A +#define ARIZONA_IN4R_CONTROL 0x32C #define ARIZONA_ADC_DIGITAL_VOLUME_4R 0x32D #define ARIZONA_DMIC4R_CONTROL 0x32E #define ARIZONA_OUTPUT_ENABLES_1 0x400 @@ -224,6 +226,9 @@ #define ARIZONA_PDM_SPK1_CTRL_2 0x491 #define ARIZONA_PDM_SPK2_CTRL_1 0x492 #define ARIZONA_PDM_SPK2_CTRL_2 0x493 +#define ARIZONA_HP1_SHORT_CIRCUIT_CTRL 0x4A0 +#define ARIZONA_HP2_SHORT_CIRCUIT_CTRL 0x4A1 +#define ARIZONA_HP3_SHORT_CIRCUIT_CTRL 0x4A2 #define ARIZONA_SPK_CTRL_2 0x4B5 #define ARIZONA_SPK_CTRL_3 0x4B6 #define ARIZONA_DAC_COMP_1 0x4DC @@ -511,6 +516,38 @@ #define ARIZONA_AIF2TX2MIX_INPUT_3_VOLUME 0x74D #define ARIZONA_AIF2TX2MIX_INPUT_4_SOURCE 0x74E #define ARIZONA_AIF2TX2MIX_INPUT_4_VOLUME 0x74F +#define ARIZONA_AIF2TX3MIX_INPUT_1_SOURCE 0x750 +#define ARIZONA_AIF2TX3MIX_INPUT_1_VOLUME 0x751 +#define ARIZONA_AIF2TX3MIX_INPUT_2_SOURCE 0x752 +#define ARIZONA_AIF2TX3MIX_INPUT_2_VOLUME 0x753 +#define ARIZONA_AIF2TX3MIX_INPUT_3_SOURCE 0x754 +#define ARIZONA_AIF2TX3MIX_INPUT_3_VOLUME 0x755 +#define ARIZONA_AIF2TX3MIX_INPUT_4_SOURCE 0x756 +#define ARIZONA_AIF2TX3MIX_INPUT_4_VOLUME 0x757 +#define ARIZONA_AIF2TX4MIX_INPUT_1_SOURCE 0x758 +#define ARIZONA_AIF2TX4MIX_INPUT_1_VOLUME 0x759 +#define ARIZONA_AIF2TX4MIX_INPUT_2_SOURCE 0x75A +#define ARIZONA_AIF2TX4MIX_INPUT_2_VOLUME 0x75B +#define ARIZONA_AIF2TX4MIX_INPUT_3_SOURCE 0x75C +#define ARIZONA_AIF2TX4MIX_INPUT_3_VOLUME 0x75D +#define ARIZONA_AIF2TX4MIX_INPUT_4_SOURCE 0x75E +#define ARIZONA_AIF2TX4MIX_INPUT_4_VOLUME 0x75F +#define ARIZONA_AIF2TX5MIX_INPUT_1_SOURCE 0x760 +#define ARIZONA_AIF2TX5MIX_INPUT_1_VOLUME 0x761 +#define ARIZONA_AIF2TX5MIX_INPUT_2_SOURCE 0x762 +#define ARIZONA_AIF2TX5MIX_INPUT_2_VOLUME 0x763 +#define ARIZONA_AIF2TX5MIX_INPUT_3_SOURCE 0x764 +#define ARIZONA_AIF2TX5MIX_INPUT_3_VOLUME 0x765 +#define ARIZONA_AIF2TX5MIX_INPUT_4_SOURCE 0x766 +#define ARIZONA_AIF2TX5MIX_INPUT_4_VOLUME 0x767 +#define ARIZONA_AIF2TX6MIX_INPUT_1_SOURCE 0x768 +#define ARIZONA_AIF2TX6MIX_INPUT_1_VOLUME 0x769 +#define ARIZONA_AIF2TX6MIX_INPUT_2_SOURCE 0x76A +#define ARIZONA_AIF2TX6MIX_INPUT_2_VOLUME 0x76B +#define ARIZONA_AIF2TX6MIX_INPUT_3_SOURCE 0x76C +#define ARIZONA_AIF2TX6MIX_INPUT_3_VOLUME 0x76D +#define ARIZONA_AIF2TX6MIX_INPUT_4_SOURCE 0x76E +#define ARIZONA_AIF2TX6MIX_INPUT_4_VOLUME 0x76F #define ARIZONA_AIF3TX1MIX_INPUT_1_SOURCE 0x780 #define ARIZONA_AIF3TX1MIX_INPUT_1_VOLUME 0x781 #define ARIZONA_AIF3TX1MIX_INPUT_2_SOURCE 0x782 @@ -2302,8 +2339,18 @@ #define ARIZONA_IN_VI_RAMP_WIDTH 3 /* IN_VI_RAMP - [2:0] */ /* + * R780 (0x30C) - HPF Control + */ +#define ARIZONA_IN_HPF_CUT_MASK 0x0007 /* IN_HPF_CUT [2:0] */ +#define ARIZONA_IN_HPF_CUT_SHIFT 0 /* IN_HPF_CUT [2:0] */ +#define ARIZONA_IN_HPF_CUT_WIDTH 3 /* IN_HPF_CUT [2:0] */ + +/* * R784 (0x310) - IN1L Control */ +#define ARIZONA_IN1L_HPF_MASK 0x8000 /* IN1L_HPF - [15] */ +#define ARIZONA_IN1L_HPF_SHIFT 15 /* IN1L_HPF - [15] */ +#define ARIZONA_IN1L_HPF_WIDTH 1 /* IN1L_HPF - [15] */ #define ARIZONA_IN1_OSR_MASK 0x6000 /* IN1_OSR - [14:13] */ #define ARIZONA_IN1_OSR_SHIFT 13 /* IN1_OSR - [14:13] */ #define ARIZONA_IN1_OSR_WIDTH 2 /* IN1_OSR - [14:13] */ @@ -2342,6 +2389,9 @@ /* * R788 (0x314) - IN1R Control */ +#define ARIZONA_IN1R_HPF_MASK 0x8000 /* IN1R_HPF - [15] */ +#define ARIZONA_IN1R_HPF_SHIFT 15 /* IN1R_HPF - [15] */ +#define ARIZONA_IN1R_HPF_WIDTH 1 /* IN1R_HPF - [15] */ #define ARIZONA_IN1R_PGA_VOL_MASK 0x00FE /* IN1R_PGA_VOL - [7:1] */ #define ARIZONA_IN1R_PGA_VOL_SHIFT 1 /* IN1R_PGA_VOL - [7:1] */ #define ARIZONA_IN1R_PGA_VOL_WIDTH 7 /* IN1R_PGA_VOL - [7:1] */ @@ -2371,6 +2421,9 @@ /* * R792 (0x318) - IN2L Control */ +#define ARIZONA_IN2L_HPF_MASK 0x8000 /* IN2L_HPF - [15] */ +#define ARIZONA_IN2L_HPF_SHIFT 15 /* IN2L_HPF - [15] */ +#define ARIZONA_IN2L_HPF_WIDTH 1 /* IN2L_HPF - [15] */ #define ARIZONA_IN2_OSR_MASK 0x6000 /* IN2_OSR - [14:13] */ #define ARIZONA_IN2_OSR_SHIFT 13 /* IN2_OSR - [14:13] */ #define ARIZONA_IN2_OSR_WIDTH 2 /* IN2_OSR - [14:13] */ @@ -2409,6 +2462,9 @@ /* * R796 (0x31C) - IN2R Control */ +#define ARIZONA_IN2R_HPF_MASK 0x8000 /* IN2R_HPF - [15] */ +#define ARIZONA_IN2R_HPF_SHIFT 15 /* IN2R_HPF - [15] */ +#define ARIZONA_IN2R_HPF_WIDTH 1 /* IN2R_HPF - [15] */ #define ARIZONA_IN2R_PGA_VOL_MASK 0x00FE /* IN2R_PGA_VOL - [7:1] */ #define ARIZONA_IN2R_PGA_VOL_SHIFT 1 /* IN2R_PGA_VOL - [7:1] */ #define ARIZONA_IN2R_PGA_VOL_WIDTH 7 /* IN2R_PGA_VOL - [7:1] */ @@ -2438,6 +2494,9 @@ /* * R800 (0x320) - IN3L Control */ +#define ARIZONA_IN3L_HPF_MASK 0x8000 /* IN3L_HPF - [15] */ +#define ARIZONA_IN3L_HPF_SHIFT 15 /* IN3L_HPF - [15] */ +#define ARIZONA_IN3L_HPF_WIDTH 1 /* IN3L_HPF - [15] */ #define ARIZONA_IN3_OSR_MASK 0x6000 /* IN3_OSR - [14:13] */ #define ARIZONA_IN3_OSR_SHIFT 13 /* IN3_OSR - [14:13] */ #define ARIZONA_IN3_OSR_WIDTH 2 /* IN3_OSR - [14:13] */ @@ -2476,6 +2535,9 @@ /* * R804 (0x324) - IN3R Control */ +#define ARIZONA_IN3R_HPF_MASK 0x8000 /* IN3R_HPF - [15] */ +#define ARIZONA_IN3R_HPF_SHIFT 15 /* IN3R_HPF - [15] */ +#define ARIZONA_IN3R_HPF_WIDTH 1 /* IN3R_HPF - [15] */ #define ARIZONA_IN3R_PGA_VOL_MASK 0x00FE /* IN3R_PGA_VOL - [7:1] */ #define ARIZONA_IN3R_PGA_VOL_SHIFT 1 /* IN3R_PGA_VOL - [7:1] */ #define ARIZONA_IN3R_PGA_VOL_WIDTH 7 /* IN3R_PGA_VOL - [7:1] */ @@ -2505,6 +2567,9 @@ /* * R808 (0x328) - IN4 Control */ +#define ARIZONA_IN4L_HPF_MASK 0x8000 /* IN4L_HPF - [15] */ +#define ARIZONA_IN4L_HPF_SHIFT 15 /* IN4L_HPF - [15] */ +#define ARIZONA_IN4L_HPF_WIDTH 1 /* IN4L_HPF - [15] */ #define ARIZONA_IN4_OSR_MASK 0x6000 /* IN4_OSR - [14:13] */ #define ARIZONA_IN4_OSR_SHIFT 13 /* IN4_OSR - [14:13] */ #define ARIZONA_IN4_OSR_WIDTH 2 /* IN4_OSR - [14:13] */ @@ -2535,6 +2600,13 @@ #define ARIZONA_IN4L_DMIC_DLY_WIDTH 6 /* IN4L_DMIC_DLY - [5:0] */ /* + * R812 (0x32C) - IN4R Control + */ +#define ARIZONA_IN4R_HPF_MASK 0x8000 /* IN4R_HPF - [15] */ +#define ARIZONA_IN4R_HPF_SHIFT 15 /* IN4R_HPF - [15] */ +#define ARIZONA_IN4R_HPF_WIDTH 1 /* IN4R_HPF - [15] */ + +/* * R813 (0x32D) - ADC Digital Volume 4R */ #define ARIZONA_IN_VU 0x0200 /* IN_VU */ @@ -3147,6 +3219,10 @@ /* * R1088 (0x440) - DRE Enable */ +#define ARIZONA_DRE3R_ENA 0x0020 /* DRE3R_ENA */ +#define ARIZONA_DRE3R_ENA_MASK 0x0020 /* DRE3R_ENA */ +#define ARIZONA_DRE3R_ENA_SHIFT 5 /* DRE3R_ENA */ +#define ARIZONA_DRE3R_ENA_WIDTH 1 /* DRE3R_ENA */ #define ARIZONA_DRE3L_ENA 0x0010 /* DRE3L_ENA */ #define ARIZONA_DRE3L_ENA_MASK 0x0010 /* DRE3L_ENA */ #define ARIZONA_DRE3L_ENA_SHIFT 4 /* DRE3L_ENA */ @@ -3269,6 +3345,30 @@ #define ARIZONA_SPK2_FMT_WIDTH 1 /* SPK2_FMT */ /* + * R1184 (0x4A0) - HP1 Short Circuit Ctrl + */ +#define ARIZONA_HP1_SC_ENA 0x1000 /* HP1_SC_ENA */ +#define ARIZONA_HP1_SC_ENA_MASK 0x1000 /* HP1_SC_ENA */ +#define ARIZONA_HP1_SC_ENA_SHIFT 12 /* HP1_SC_ENA */ +#define ARIZONA_HP1_SC_ENA_WIDTH 1 /* HP1_SC_ENA */ + +/* + * R1185 (0x4A1) - HP2 Short Circuit Ctrl + */ +#define ARIZONA_HP2_SC_ENA 0x1000 /* HP2_SC_ENA */ +#define ARIZONA_HP2_SC_ENA_MASK 0x1000 /* HP2_SC_ENA */ +#define ARIZONA_HP2_SC_ENA_SHIFT 12 /* HP2_SC_ENA */ +#define ARIZONA_HP2_SC_ENA_WIDTH 1 /* HP2_SC_ENA */ + +/* + * R1186 (0x4A2) - HP3 Short Circuit Ctrl + */ +#define ARIZONA_HP3_SC_ENA 0x1000 /* HP3_SC_ENA */ +#define ARIZONA_HP3_SC_ENA_MASK 0x1000 /* HP3_SC_ENA */ +#define ARIZONA_HP3_SC_ENA_SHIFT 12 /* HP3_SC_ENA */ +#define ARIZONA_HP3_SC_ENA_WIDTH 1 /* HP3_SC_ENA */ + +/* * R1244 (0x4DC) - DAC comp 1 */ #define ARIZONA_OUT_COMP_COEFF_MASK 0xFFFF /* OUT_COMP_COEFF - [15:0] */ @@ -3735,6 +3835,35 @@ #define ARIZONA_AIF2TX2_SLOT_WIDTH 6 /* AIF2TX2_SLOT - [5:0] */ /* + * R1355 (0x54B) - AIF2 Frame Ctrl 5 + */ +#define ARIZONA_AIF2TX3_SLOT_MASK 0x003F /* AIF2TX3_SLOT - [5:0] */ +#define ARIZONA_AIF2TX3_SLOT_SHIFT 0 /* AIF2TX3_SLOT - [5:0] */ +#define ARIZONA_AIF2TX3_SLOT_WIDTH 6 /* AIF2TX3_SLOT - [5:0] */ + +/* + * R1356 (0x54C) - AIF2 Frame Ctrl 6 + */ +#define ARIZONA_AIF2TX4_SLOT_MASK 0x003F /* AIF2TX4_SLOT - [5:0] */ +#define ARIZONA_AIF2TX4_SLOT_SHIFT 0 /* AIF2TX4_SLOT - [5:0] */ +#define ARIZONA_AIF2TX4_SLOT_WIDTH 6 /* AIF2TX4_SLOT - [5:0] */ + + +/* + * R1357 (0x54D) - AIF2 Frame Ctrl 7 + */ +#define ARIZONA_AIF2TX5_SLOT_MASK 0x003F /* AIF2TX5_SLOT - [5:0] */ +#define ARIZONA_AIF2TX5_SLOT_SHIFT 0 /* AIF2TX5_SLOT - [5:0] */ +#define ARIZONA_AIF2TX5_SLOT_WIDTH 6 /* AIF2TX5_SLOT - [5:0] */ + +/* + * R1358 (0x54E) - AIF2 Frame Ctrl 8 + */ +#define ARIZONA_AIF2TX6_SLOT_MASK 0x003F /* AIF2TX6_SLOT - [5:0] */ +#define ARIZONA_AIF2TX6_SLOT_SHIFT 0 /* AIF2TX6_SLOT - [5:0] */ +#define ARIZONA_AIF2TX6_SLOT_WIDTH 6 /* AIF2TX6_SLOT - [5:0] */ + +/* * R1361 (0x551) - AIF2 Frame Ctrl 11 */ #define ARIZONA_AIF2RX1_SLOT_MASK 0x003F /* AIF2RX1_SLOT - [5:0] */ @@ -3749,8 +3878,52 @@ #define ARIZONA_AIF2RX2_SLOT_WIDTH 6 /* AIF2RX2_SLOT - [5:0] */ /* + * R1363 (0x553) - AIF2 Frame Ctrl 13 + */ +#define ARIZONA_AIF2RX3_SLOT_MASK 0x003F /* AIF2RX3_SLOT - [5:0] */ +#define ARIZONA_AIF2RX3_SLOT_SHIFT 0 /* AIF2RX3_SLOT - [5:0] */ +#define ARIZONA_AIF2RX3_SLOT_WIDTH 6 /* AIF2RX3_SLOT - [5:0] */ + +/* + * R1364 (0x554) - AIF2 Frame Ctrl 14 + */ +#define ARIZONA_AIF2RX4_SLOT_MASK 0x003F /* AIF2RX4_SLOT - [5:0] */ +#define ARIZONA_AIF2RX4_SLOT_SHIFT 0 /* AIF2RX4_SLOT - [5:0] */ +#define ARIZONA_AIF2RX4_SLOT_WIDTH 6 /* AIF2RX4_SLOT - [5:0] */ + +/* + * R1365 (0x555) - AIF2 Frame Ctrl 15 + */ +#define ARIZONA_AIF2RX5_SLOT_MASK 0x003F /* AIF2RX5_SLOT - [5:0] */ +#define ARIZONA_AIF2RX5_SLOT_SHIFT 0 /* AIF2RX5_SLOT - [5:0] */ +#define ARIZONA_AIF2RX5_SLOT_WIDTH 6 /* AIF2RX5_SLOT - [5:0] */ + +/* + * R1366 (0x556) - AIF2 Frame Ctrl 16 + */ +#define ARIZONA_AIF2RX6_SLOT_MASK 0x003F /* AIF2RX6_SLOT - [5:0] */ +#define ARIZONA_AIF2RX6_SLOT_SHIFT 0 /* AIF2RX6_SLOT - [5:0] */ +#define ARIZONA_AIF2RX6_SLOT_WIDTH 6 /* AIF2RX6_SLOT - [5:0] */ + +/* * R1369 (0x559) - AIF2 Tx Enables */ +#define ARIZONA_AIF2TX6_ENA 0x0020 /* AIF2TX6_ENA */ +#define ARIZONA_AIF2TX6_ENA_MASK 0x0020 /* AIF2TX6_ENA */ +#define ARIZONA_AIF2TX6_ENA_SHIFT 5 /* AIF2TX6_ENA */ +#define ARIZONA_AIF2TX6_ENA_WIDTH 1 /* AIF2TX6_ENA */ +#define ARIZONA_AIF2TX5_ENA 0x0010 /* AIF2TX5_ENA */ +#define ARIZONA_AIF2TX5_ENA_MASK 0x0010 /* AIF2TX5_ENA */ +#define ARIZONA_AIF2TX5_ENA_SHIFT 4 /* AIF2TX5_ENA */ +#define ARIZONA_AIF2TX5_ENA_WIDTH 1 /* AIF2TX5_ENA */ +#define ARIZONA_AIF2TX4_ENA 0x0008 /* AIF2TX4_ENA */ +#define ARIZONA_AIF2TX4_ENA_MASK 0x0008 /* AIF2TX4_ENA */ +#define ARIZONA_AIF2TX4_ENA_SHIFT 3 /* AIF2TX4_ENA */ +#define ARIZONA_AIF2TX4_ENA_WIDTH 1 /* AIF2TX4_ENA */ +#define ARIZONA_AIF2TX3_ENA 0x0004 /* AIF2TX3_ENA */ +#define ARIZONA_AIF2TX3_ENA_MASK 0x0004 /* AIF2TX3_ENA */ +#define ARIZONA_AIF2TX3_ENA_SHIFT 2 /* AIF2TX3_ENA */ +#define ARIZONA_AIF2TX3_ENA_WIDTH 1 /* AIF2TX3_ENA */ #define ARIZONA_AIF2TX2_ENA 0x0002 /* AIF2TX2_ENA */ #define ARIZONA_AIF2TX2_ENA_MASK 0x0002 /* AIF2TX2_ENA */ #define ARIZONA_AIF2TX2_ENA_SHIFT 1 /* AIF2TX2_ENA */ @@ -3763,6 +3936,22 @@ /* * R1370 (0x55A) - AIF2 Rx Enables */ +#define ARIZONA_AIF2RX6_ENA 0x0020 /* AIF2RX6_ENA */ +#define ARIZONA_AIF2RX6_ENA_MASK 0x0020 /* AIF2RX6_ENA */ +#define ARIZONA_AIF2RX6_ENA_SHIFT 5 /* AIF2RX6_ENA */ +#define ARIZONA_AIF2RX6_ENA_WIDTH 1 /* AIF2RX6_ENA */ +#define ARIZONA_AIF2RX5_ENA 0x0010 /* AIF2RX5_ENA */ +#define ARIZONA_AIF2RX5_ENA_MASK 0x0010 /* AIF2RX5_ENA */ +#define ARIZONA_AIF2RX5_ENA_SHIFT 4 /* AIF2RX5_ENA */ +#define ARIZONA_AIF2RX5_ENA_WIDTH 1 /* AIF2RX5_ENA */ +#define ARIZONA_AIF2RX4_ENA 0x0008 /* AIF2RX4_ENA */ +#define ARIZONA_AIF2RX4_ENA_MASK 0x0008 /* AIF2RX4_ENA */ +#define ARIZONA_AIF2RX4_ENA_SHIFT 3 /* AIF2RX4_ENA */ +#define ARIZONA_AIF2RX4_ENA_WIDTH 1 /* AIF2RX4_ENA */ +#define ARIZONA_AIF2RX3_ENA 0x0004 /* AIF2RX3_ENA */ +#define ARIZONA_AIF2RX3_ENA_MASK 0x0004 /* AIF2RX3_ENA */ +#define ARIZONA_AIF2RX3_ENA_SHIFT 2 /* AIF2RX3_ENA */ +#define ARIZONA_AIF2RX3_ENA_WIDTH 1 /* AIF2RX3_ENA */ #define ARIZONA_AIF2RX2_ENA 0x0002 /* AIF2RX2_ENA */ #define ARIZONA_AIF2RX2_ENA_MASK 0x0002 /* AIF2RX2_ENA */ #define ARIZONA_AIF2RX2_ENA_SHIFT 1 /* AIF2RX2_ENA */ diff --git a/include/linux/platform_data/asoc-ti-mcbsp.h b/include/linux/platform_data/asoc-ti-mcbsp.h index c78d90b..3c73c04 100644 --- a/include/linux/platform_data/asoc-ti-mcbsp.h +++ b/include/linux/platform_data/asoc-ti-mcbsp.h @@ -1,6 +1,4 @@ /* - * arch/arm/plat-omap/include/mach/mcbsp.h - * * Defines for Multi-Channel Buffered Serial Port * * Copyright (C) 2002 RidgeRun, Inc. @@ -21,8 +19,8 @@ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * */ -#ifndef __ASM_ARCH_OMAP_MCBSP_H -#define __ASM_ARCH_OMAP_MCBSP_H +#ifndef __ASOC_TI_MCBSP_H +#define __ASOC_TI_MCBSP_H #include <linux/spinlock.h> #include <linux/clk.h> diff --git a/include/linux/platform_data/asoc-ux500-msp.h b/include/linux/platform_data/asoc-ux500-msp.h index 9991aea..2f34bb9 100644 --- a/include/linux/platform_data/asoc-ux500-msp.h +++ b/include/linux/platform_data/asoc-ux500-msp.h @@ -10,16 +10,9 @@ #include <linux/platform_data/dma-ste-dma40.h> -enum msp_i2s_id { - MSP_I2S_0 = 0, - MSP_I2S_1, - MSP_I2S_2, - MSP_I2S_3, -}; - /* Platform data structure for a MSP I2S-device */ struct msp_i2s_platform_data { - enum msp_i2s_id id; + int id; struct stedma40_chan_cfg *msp_i2s_dma_rx; struct stedma40_chan_cfg *msp_i2s_dma_tx; }; diff --git a/include/linux/platform_data/davinci_asp.h b/include/linux/platform_data/davinci_asp.h index 689a856..5245992 100644 --- a/include/linux/platform_data/davinci_asp.h +++ b/include/linux/platform_data/davinci_asp.h @@ -92,6 +92,7 @@ enum { MCASP_VERSION_1 = 0, /* DM646x */ MCASP_VERSION_2, /* DA8xx/OMAPL1x */ MCASP_VERSION_3, /* TI81xx/AM33xx */ + MCASP_VERSION_4, /* DRA7xxx */ }; enum mcbsp_clk_input_pin { diff --git a/include/sound/cs42l52.h b/include/sound/cs42l52.h index 7c2be4a..bbabf84 100644 --- a/include/sound/cs42l52.h +++ b/include/sound/cs42l52.h @@ -16,17 +16,11 @@ struct cs42l52_platform_data { /* MICBIAS Level. Check datasheet Pg48 */ unsigned int micbias_lvl; - /* MICA mode selection 0=Single 1=Differential */ - unsigned int mica_cfg; + /* MICA mode selection Differential or Single-ended */ + bool mica_diff_cfg; - /* MICB mode selection 0=Single 1=Differential */ - unsigned int micb_cfg; - - /* MICA Select 0=MIC1A 1=MIC2A */ - unsigned int mica_sel; - - /* MICB Select 0=MIC2A 1=MIC2B */ - unsigned int micb_sel; + /* MICB mode selection Differential or Single-ended */ + bool micb_diff_cfg; /* Charge Pump Freq. Check datasheet Pg73 */ unsigned int chgfreq; diff --git a/include/sound/dmaengine_pcm.h b/include/sound/dmaengine_pcm.h index 1501731..eb73a3a 100644 --- a/include/sound/dmaengine_pcm.h +++ b/include/sound/dmaengine_pcm.h @@ -114,6 +114,10 @@ void snd_dmaengine_pcm_set_config_from_dai_data( * @compat_filter_fn: Will be used as the filter function when requesting a * channel for platforms which do not use devicetree. The filter parameter * will be the DAI's DMA data. + * @dma_dev: If set, request DMA channel on this device rather than the DAI + * device. + * @chan_names: If set, these custom DMA channel names will be requested at + * registration time. * @pcm_hardware: snd_pcm_hardware struct to be used for the PCM. * @prealloc_buffer_size: Size of the preallocated audio buffer. * @@ -130,6 +134,8 @@ struct snd_dmaengine_pcm_config { struct snd_soc_pcm_runtime *rtd, struct snd_pcm_substream *substream); dma_filter_fn compat_filter_fn; + struct device *dma_dev; + const char *chan_names[SNDRV_PCM_STREAM_LAST + 1]; const struct snd_pcm_hardware *pcm_hardware; unsigned int prealloc_buffer_size; @@ -140,6 +146,10 @@ int snd_dmaengine_pcm_register(struct device *dev, unsigned int flags); void snd_dmaengine_pcm_unregister(struct device *dev); +int devm_snd_dmaengine_pcm_register(struct device *dev, + const struct snd_dmaengine_pcm_config *config, + unsigned int flags); + int snd_dmaengine_pcm_prepare_slave_config(struct snd_pcm_substream *substream, struct snd_pcm_hw_params *params, struct dma_slave_config *slave_config); diff --git a/include/sound/hda_verbs.h b/include/sound/hda_verbs.h new file mode 100644 index 0000000..d0509db --- /dev/null +++ b/include/sound/hda_verbs.h @@ -0,0 +1,554 @@ +/* + * HD-audio codec verbs + */ + +#ifndef __SOUND_HDA_VERBS_H +#define __SOUND_HDA_VERBS_H + +/* + * nodes + */ +#define AC_NODE_ROOT 0x00 + +/* + * function group types + */ +enum { + AC_GRP_AUDIO_FUNCTION = 0x01, + AC_GRP_MODEM_FUNCTION = 0x02, +}; + +/* + * widget types + */ +enum { + AC_WID_AUD_OUT, /* Audio Out */ + AC_WID_AUD_IN, /* Audio In */ + AC_WID_AUD_MIX, /* Audio Mixer */ + AC_WID_AUD_SEL, /* Audio Selector */ + AC_WID_PIN, /* Pin Complex */ + AC_WID_POWER, /* Power */ + AC_WID_VOL_KNB, /* Volume Knob */ + AC_WID_BEEP, /* Beep Generator */ + AC_WID_VENDOR = 0x0f /* Vendor specific */ +}; + +/* + * GET verbs + */ +#define AC_VERB_GET_STREAM_FORMAT 0x0a00 +#define AC_VERB_GET_AMP_GAIN_MUTE 0x0b00 +#define AC_VERB_GET_PROC_COEF 0x0c00 +#define AC_VERB_GET_COEF_INDEX 0x0d00 +#define AC_VERB_PARAMETERS 0x0f00 +#define AC_VERB_GET_CONNECT_SEL 0x0f01 +#define AC_VERB_GET_CONNECT_LIST 0x0f02 +#define AC_VERB_GET_PROC_STATE 0x0f03 +#define AC_VERB_GET_SDI_SELECT 0x0f04 +#define AC_VERB_GET_POWER_STATE 0x0f05 +#define AC_VERB_GET_CONV 0x0f06 +#define AC_VERB_GET_PIN_WIDGET_CONTROL 0x0f07 +#define AC_VERB_GET_UNSOLICITED_RESPONSE 0x0f08 +#define AC_VERB_GET_PIN_SENSE 0x0f09 +#define AC_VERB_GET_BEEP_CONTROL 0x0f0a +#define AC_VERB_GET_EAPD_BTLENABLE 0x0f0c +#define AC_VERB_GET_DIGI_CONVERT_1 0x0f0d +#define AC_VERB_GET_DIGI_CONVERT_2 0x0f0e /* unused */ +#define AC_VERB_GET_VOLUME_KNOB_CONTROL 0x0f0f +/* f10-f1a: GPIO */ +#define AC_VERB_GET_GPIO_DATA 0x0f15 +#define AC_VERB_GET_GPIO_MASK 0x0f16 +#define AC_VERB_GET_GPIO_DIRECTION 0x0f17 +#define AC_VERB_GET_GPIO_WAKE_MASK 0x0f18 +#define AC_VERB_GET_GPIO_UNSOLICITED_RSP_MASK 0x0f19 +#define AC_VERB_GET_GPIO_STICKY_MASK 0x0f1a +#define AC_VERB_GET_CONFIG_DEFAULT 0x0f1c +/* f20: AFG/MFG */ +#define AC_VERB_GET_SUBSYSTEM_ID 0x0f20 +#define AC_VERB_GET_CVT_CHAN_COUNT 0x0f2d +#define AC_VERB_GET_HDMI_DIP_SIZE 0x0f2e +#define AC_VERB_GET_HDMI_ELDD 0x0f2f +#define AC_VERB_GET_HDMI_DIP_INDEX 0x0f30 +#define AC_VERB_GET_HDMI_DIP_DATA 0x0f31 +#define AC_VERB_GET_HDMI_DIP_XMIT 0x0f32 +#define AC_VERB_GET_HDMI_CP_CTRL 0x0f33 +#define AC_VERB_GET_HDMI_CHAN_SLOT 0x0f34 +#define AC_VERB_GET_DEVICE_SEL 0xf35 +#define AC_VERB_GET_DEVICE_LIST 0xf36 + +/* + * SET verbs + */ +#define AC_VERB_SET_STREAM_FORMAT 0x200 +#define AC_VERB_SET_AMP_GAIN_MUTE 0x300 +#define AC_VERB_SET_PROC_COEF 0x400 +#define AC_VERB_SET_COEF_INDEX 0x500 +#define AC_VERB_SET_CONNECT_SEL 0x701 +#define AC_VERB_SET_PROC_STATE 0x703 +#define AC_VERB_SET_SDI_SELECT 0x704 +#define AC_VERB_SET_POWER_STATE 0x705 +#define AC_VERB_SET_CHANNEL_STREAMID 0x706 +#define AC_VERB_SET_PIN_WIDGET_CONTROL 0x707 +#define AC_VERB_SET_UNSOLICITED_ENABLE 0x708 +#define AC_VERB_SET_PIN_SENSE 0x709 +#define AC_VERB_SET_BEEP_CONTROL 0x70a +#define AC_VERB_SET_EAPD_BTLENABLE 0x70c +#define AC_VERB_SET_DIGI_CONVERT_1 0x70d +#define AC_VERB_SET_DIGI_CONVERT_2 0x70e +#define AC_VERB_SET_VOLUME_KNOB_CONTROL 0x70f +#define AC_VERB_SET_GPIO_DATA 0x715 +#define AC_VERB_SET_GPIO_MASK 0x716 +#define AC_VERB_SET_GPIO_DIRECTION 0x717 +#define AC_VERB_SET_GPIO_WAKE_MASK 0x718 +#define AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK 0x719 +#define AC_VERB_SET_GPIO_STICKY_MASK 0x71a +#define AC_VERB_SET_CONFIG_DEFAULT_BYTES_0 0x71c +#define AC_VERB_SET_CONFIG_DEFAULT_BYTES_1 0x71d +#define AC_VERB_SET_CONFIG_DEFAULT_BYTES_2 0x71e +#define AC_VERB_SET_CONFIG_DEFAULT_BYTES_3 0x71f +#define AC_VERB_SET_EAPD 0x788 +#define AC_VERB_SET_CODEC_RESET 0x7ff +#define AC_VERB_SET_CVT_CHAN_COUNT 0x72d +#define AC_VERB_SET_HDMI_DIP_INDEX 0x730 +#define AC_VERB_SET_HDMI_DIP_DATA 0x731 +#define AC_VERB_SET_HDMI_DIP_XMIT 0x732 +#define AC_VERB_SET_HDMI_CP_CTRL 0x733 +#define AC_VERB_SET_HDMI_CHAN_SLOT 0x734 +#define AC_VERB_SET_DEVICE_SEL 0x735 + +/* + * Parameter IDs + */ +#define AC_PAR_VENDOR_ID 0x00 +#define AC_PAR_SUBSYSTEM_ID 0x01 +#define AC_PAR_REV_ID 0x02 +#define AC_PAR_NODE_COUNT 0x04 +#define AC_PAR_FUNCTION_TYPE 0x05 +#define AC_PAR_AUDIO_FG_CAP 0x08 +#define AC_PAR_AUDIO_WIDGET_CAP 0x09 +#define AC_PAR_PCM 0x0a +#define AC_PAR_STREAM 0x0b +#define AC_PAR_PIN_CAP 0x0c +#define AC_PAR_AMP_IN_CAP 0x0d +#define AC_PAR_CONNLIST_LEN 0x0e +#define AC_PAR_POWER_STATE 0x0f +#define AC_PAR_PROC_CAP 0x10 +#define AC_PAR_GPIO_CAP 0x11 +#define AC_PAR_AMP_OUT_CAP 0x12 +#define AC_PAR_VOL_KNB_CAP 0x13 +#define AC_PAR_DEVLIST_LEN 0x15 +#define AC_PAR_HDMI_LPCM_CAP 0x20 + +/* + * AC_VERB_PARAMETERS results (32bit) + */ + +/* Function Group Type */ +#define AC_FGT_TYPE (0xff<<0) +#define AC_FGT_TYPE_SHIFT 0 +#define AC_FGT_UNSOL_CAP (1<<8) + +/* Audio Function Group Capabilities */ +#define AC_AFG_OUT_DELAY (0xf<<0) +#define AC_AFG_IN_DELAY (0xf<<8) +#define AC_AFG_BEEP_GEN (1<<16) + +/* Audio Widget Capabilities */ +#define AC_WCAP_STEREO (1<<0) /* stereo I/O */ +#define AC_WCAP_IN_AMP (1<<1) /* AMP-in present */ +#define AC_WCAP_OUT_AMP (1<<2) /* AMP-out present */ +#define AC_WCAP_AMP_OVRD (1<<3) /* AMP-parameter override */ +#define AC_WCAP_FORMAT_OVRD (1<<4) /* format override */ +#define AC_WCAP_STRIPE (1<<5) /* stripe */ +#define AC_WCAP_PROC_WID (1<<6) /* Proc Widget */ +#define AC_WCAP_UNSOL_CAP (1<<7) /* Unsol capable */ +#define AC_WCAP_CONN_LIST (1<<8) /* connection list */ +#define AC_WCAP_DIGITAL (1<<9) /* digital I/O */ +#define AC_WCAP_POWER (1<<10) /* power control */ +#define AC_WCAP_LR_SWAP (1<<11) /* L/R swap */ +#define AC_WCAP_CP_CAPS (1<<12) /* content protection */ +#define AC_WCAP_CHAN_CNT_EXT (7<<13) /* channel count ext */ +#define AC_WCAP_DELAY (0xf<<16) +#define AC_WCAP_DELAY_SHIFT 16 +#define AC_WCAP_TYPE (0xf<<20) +#define AC_WCAP_TYPE_SHIFT 20 + +/* supported PCM rates and bits */ +#define AC_SUPPCM_RATES (0xfff << 0) +#define AC_SUPPCM_BITS_8 (1<<16) +#define AC_SUPPCM_BITS_16 (1<<17) +#define AC_SUPPCM_BITS_20 (1<<18) +#define AC_SUPPCM_BITS_24 (1<<19) +#define AC_SUPPCM_BITS_32 (1<<20) + +/* supported PCM stream format */ +#define AC_SUPFMT_PCM (1<<0) +#define AC_SUPFMT_FLOAT32 (1<<1) +#define AC_SUPFMT_AC3 (1<<2) + +/* GP I/O count */ +#define AC_GPIO_IO_COUNT (0xff<<0) +#define AC_GPIO_O_COUNT (0xff<<8) +#define AC_GPIO_O_COUNT_SHIFT 8 +#define AC_GPIO_I_COUNT (0xff<<16) +#define AC_GPIO_I_COUNT_SHIFT 16 +#define AC_GPIO_UNSOLICITED (1<<30) +#define AC_GPIO_WAKE (1<<31) + +/* Converter stream, channel */ +#define AC_CONV_CHANNEL (0xf<<0) +#define AC_CONV_STREAM (0xf<<4) +#define AC_CONV_STREAM_SHIFT 4 + +/* Input converter SDI select */ +#define AC_SDI_SELECT (0xf<<0) + +/* stream format id */ +#define AC_FMT_CHAN_SHIFT 0 +#define AC_FMT_CHAN_MASK (0x0f << 0) +#define AC_FMT_BITS_SHIFT 4 +#define AC_FMT_BITS_MASK (7 << 4) +#define AC_FMT_BITS_8 (0 << 4) +#define AC_FMT_BITS_16 (1 << 4) +#define AC_FMT_BITS_20 (2 << 4) +#define AC_FMT_BITS_24 (3 << 4) +#define AC_FMT_BITS_32 (4 << 4) +#define AC_FMT_DIV_SHIFT 8 +#define AC_FMT_DIV_MASK (7 << 8) +#define AC_FMT_MULT_SHIFT 11 +#define AC_FMT_MULT_MASK (7 << 11) +#define AC_FMT_BASE_SHIFT 14 +#define AC_FMT_BASE_48K (0 << 14) +#define AC_FMT_BASE_44K (1 << 14) +#define AC_FMT_TYPE_SHIFT 15 +#define AC_FMT_TYPE_PCM (0 << 15) +#define AC_FMT_TYPE_NON_PCM (1 << 15) + +/* Unsolicited response control */ +#define AC_UNSOL_TAG (0x3f<<0) +#define AC_UNSOL_ENABLED (1<<7) +#define AC_USRSP_EN AC_UNSOL_ENABLED + +/* Unsolicited responses */ +#define AC_UNSOL_RES_TAG (0x3f<<26) +#define AC_UNSOL_RES_TAG_SHIFT 26 +#define AC_UNSOL_RES_SUBTAG (0x1f<<21) +#define AC_UNSOL_RES_SUBTAG_SHIFT 21 +#define AC_UNSOL_RES_DE (0x3f<<15) /* Device Entry + * (for DP1.2 MST) + */ +#define AC_UNSOL_RES_DE_SHIFT 15 +#define AC_UNSOL_RES_IA (1<<2) /* Inactive (for DP1.2 MST) */ +#define AC_UNSOL_RES_ELDV (1<<1) /* ELD Data valid (for HDMI) */ +#define AC_UNSOL_RES_PD (1<<0) /* pinsense detect */ +#define AC_UNSOL_RES_CP_STATE (1<<1) /* content protection */ +#define AC_UNSOL_RES_CP_READY (1<<0) /* content protection */ + +/* Pin widget capabilies */ +#define AC_PINCAP_IMP_SENSE (1<<0) /* impedance sense capable */ +#define AC_PINCAP_TRIG_REQ (1<<1) /* trigger required */ +#define AC_PINCAP_PRES_DETECT (1<<2) /* presence detect capable */ +#define AC_PINCAP_HP_DRV (1<<3) /* headphone drive capable */ +#define AC_PINCAP_OUT (1<<4) /* output capable */ +#define AC_PINCAP_IN (1<<5) /* input capable */ +#define AC_PINCAP_BALANCE (1<<6) /* balanced I/O capable */ +/* Note: This LR_SWAP pincap is defined in the Realtek ALC883 specification, + * but is marked reserved in the Intel HDA specification. + */ +#define AC_PINCAP_LR_SWAP (1<<7) /* L/R swap */ +/* Note: The same bit as LR_SWAP is newly defined as HDMI capability + * in HD-audio specification + */ +#define AC_PINCAP_HDMI (1<<7) /* HDMI pin */ +#define AC_PINCAP_DP (1<<24) /* DisplayPort pin, can + * coexist with AC_PINCAP_HDMI + */ +#define AC_PINCAP_VREF (0x37<<8) +#define AC_PINCAP_VREF_SHIFT 8 +#define AC_PINCAP_EAPD (1<<16) /* EAPD capable */ +#define AC_PINCAP_HBR (1<<27) /* High Bit Rate */ +/* Vref status (used in pin cap) */ +#define AC_PINCAP_VREF_HIZ (1<<0) /* Hi-Z */ +#define AC_PINCAP_VREF_50 (1<<1) /* 50% */ +#define AC_PINCAP_VREF_GRD (1<<2) /* ground */ +#define AC_PINCAP_VREF_80 (1<<4) /* 80% */ +#define AC_PINCAP_VREF_100 (1<<5) /* 100% */ + +/* Amplifier capabilities */ +#define AC_AMPCAP_OFFSET (0x7f<<0) /* 0dB offset */ +#define AC_AMPCAP_OFFSET_SHIFT 0 +#define AC_AMPCAP_NUM_STEPS (0x7f<<8) /* number of steps */ +#define AC_AMPCAP_NUM_STEPS_SHIFT 8 +#define AC_AMPCAP_STEP_SIZE (0x7f<<16) /* step size 0-32dB + * in 0.25dB + */ +#define AC_AMPCAP_STEP_SIZE_SHIFT 16 +#define AC_AMPCAP_MUTE (1<<31) /* mute capable */ +#define AC_AMPCAP_MUTE_SHIFT 31 + +/* driver-specific amp-caps: using bits 24-30 */ +#define AC_AMPCAP_MIN_MUTE (1 << 30) /* min-volume = mute */ + +/* Connection list */ +#define AC_CLIST_LENGTH (0x7f<<0) +#define AC_CLIST_LONG (1<<7) + +/* Supported power status */ +#define AC_PWRST_D0SUP (1<<0) +#define AC_PWRST_D1SUP (1<<1) +#define AC_PWRST_D2SUP (1<<2) +#define AC_PWRST_D3SUP (1<<3) +#define AC_PWRST_D3COLDSUP (1<<4) +#define AC_PWRST_S3D3COLDSUP (1<<29) +#define AC_PWRST_CLKSTOP (1<<30) +#define AC_PWRST_EPSS (1U<<31) + +/* Power state values */ +#define AC_PWRST_SETTING (0xf<<0) +#define AC_PWRST_ACTUAL (0xf<<4) +#define AC_PWRST_ACTUAL_SHIFT 4 +#define AC_PWRST_D0 0x00 +#define AC_PWRST_D1 0x01 +#define AC_PWRST_D2 0x02 +#define AC_PWRST_D3 0x03 +#define AC_PWRST_ERROR (1<<8) +#define AC_PWRST_CLK_STOP_OK (1<<9) +#define AC_PWRST_SETTING_RESET (1<<10) + +/* Processing capabilies */ +#define AC_PCAP_BENIGN (1<<0) +#define AC_PCAP_NUM_COEF (0xff<<8) +#define AC_PCAP_NUM_COEF_SHIFT 8 + +/* Volume knobs capabilities */ +#define AC_KNBCAP_NUM_STEPS (0x7f<<0) +#define AC_KNBCAP_DELTA (1<<7) + +/* HDMI LPCM capabilities */ +#define AC_LPCMCAP_48K_CP_CHNS (0x0f<<0) /* max channels w/ CP-on */ +#define AC_LPCMCAP_48K_NO_CHNS (0x0f<<4) /* max channels w/o CP-on */ +#define AC_LPCMCAP_48K_20BIT (1<<8) /* 20b bitrate supported */ +#define AC_LPCMCAP_48K_24BIT (1<<9) /* 24b bitrate supported */ +#define AC_LPCMCAP_96K_CP_CHNS (0x0f<<10) /* max channels w/ CP-on */ +#define AC_LPCMCAP_96K_NO_CHNS (0x0f<<14) /* max channels w/o CP-on */ +#define AC_LPCMCAP_96K_20BIT (1<<18) /* 20b bitrate supported */ +#define AC_LPCMCAP_96K_24BIT (1<<19) /* 24b bitrate supported */ +#define AC_LPCMCAP_192K_CP_CHNS (0x0f<<20) /* max channels w/ CP-on */ +#define AC_LPCMCAP_192K_NO_CHNS (0x0f<<24) /* max channels w/o CP-on */ +#define AC_LPCMCAP_192K_20BIT (1<<28) /* 20b bitrate supported */ +#define AC_LPCMCAP_192K_24BIT (1<<29) /* 24b bitrate supported */ +#define AC_LPCMCAP_44K (1<<30) /* 44.1kHz support */ +#define AC_LPCMCAP_44K_MS (1<<31) /* 44.1kHz-multiplies support */ + +/* Display pin's device list length */ +#define AC_DEV_LIST_LEN_MASK 0x3f +#define AC_MAX_DEV_LIST_LEN 64 + +/* + * Control Parameters + */ + +/* Amp gain/mute */ +#define AC_AMP_MUTE (1<<7) +#define AC_AMP_GAIN (0x7f) +#define AC_AMP_GET_INDEX (0xf<<0) + +#define AC_AMP_GET_LEFT (1<<13) +#define AC_AMP_GET_RIGHT (0<<13) +#define AC_AMP_GET_OUTPUT (1<<15) +#define AC_AMP_GET_INPUT (0<<15) + +#define AC_AMP_SET_INDEX (0xf<<8) +#define AC_AMP_SET_INDEX_SHIFT 8 +#define AC_AMP_SET_RIGHT (1<<12) +#define AC_AMP_SET_LEFT (1<<13) +#define AC_AMP_SET_INPUT (1<<14) +#define AC_AMP_SET_OUTPUT (1<<15) + +/* DIGITAL1 bits */ +#define AC_DIG1_ENABLE (1<<0) +#define AC_DIG1_V (1<<1) +#define AC_DIG1_VCFG (1<<2) +#define AC_DIG1_EMPHASIS (1<<3) +#define AC_DIG1_COPYRIGHT (1<<4) +#define AC_DIG1_NONAUDIO (1<<5) +#define AC_DIG1_PROFESSIONAL (1<<6) +#define AC_DIG1_LEVEL (1<<7) + +/* DIGITAL2 bits */ +#define AC_DIG2_CC (0x7f<<0) + +/* DIGITAL3 bits */ +#define AC_DIG3_ICT (0xf<<0) +#define AC_DIG3_KAE (1<<7) + +/* Pin widget control - 8bit */ +#define AC_PINCTL_EPT (0x3<<0) +#define AC_PINCTL_EPT_NATIVE 0 +#define AC_PINCTL_EPT_HBR 3 +#define AC_PINCTL_VREFEN (0x7<<0) +#define AC_PINCTL_VREF_HIZ 0 /* Hi-Z */ +#define AC_PINCTL_VREF_50 1 /* 50% */ +#define AC_PINCTL_VREF_GRD 2 /* ground */ +#define AC_PINCTL_VREF_80 4 /* 80% */ +#define AC_PINCTL_VREF_100 5 /* 100% */ +#define AC_PINCTL_IN_EN (1<<5) +#define AC_PINCTL_OUT_EN (1<<6) +#define AC_PINCTL_HP_EN (1<<7) + +/* Pin sense - 32bit */ +#define AC_PINSENSE_IMPEDANCE_MASK (0x7fffffff) +#define AC_PINSENSE_PRESENCE (1<<31) +#define AC_PINSENSE_ELDV (1<<30) /* ELD valid (HDMI) */ + +/* EAPD/BTL enable - 32bit */ +#define AC_EAPDBTL_BALANCED (1<<0) +#define AC_EAPDBTL_EAPD (1<<1) +#define AC_EAPDBTL_LR_SWAP (1<<2) + +/* HDMI ELD data */ +#define AC_ELDD_ELD_VALID (1<<31) +#define AC_ELDD_ELD_DATA 0xff + +/* HDMI DIP size */ +#define AC_DIPSIZE_ELD_BUF (1<<3) /* ELD buf size of packet size */ +#define AC_DIPSIZE_PACK_IDX (0x07<<0) /* packet index */ + +/* HDMI DIP index */ +#define AC_DIPIDX_PACK_IDX (0x07<<5) /* packet idnex */ +#define AC_DIPIDX_BYTE_IDX (0x1f<<0) /* byte index */ + +/* HDMI DIP xmit (transmit) control */ +#define AC_DIPXMIT_MASK (0x3<<6) +#define AC_DIPXMIT_DISABLE (0x0<<6) /* disable xmit */ +#define AC_DIPXMIT_ONCE (0x2<<6) /* xmit once then disable */ +#define AC_DIPXMIT_BEST (0x3<<6) /* best effort */ + +/* HDMI content protection (CP) control */ +#define AC_CPCTRL_CES (1<<9) /* current encryption state */ +#define AC_CPCTRL_READY (1<<8) /* ready bit */ +#define AC_CPCTRL_SUBTAG (0x1f<<3) /* subtag for unsol-resp */ +#define AC_CPCTRL_STATE (3<<0) /* current CP request state */ + +/* Converter channel <-> HDMI slot mapping */ +#define AC_CVTMAP_HDMI_SLOT (0xf<<0) /* HDMI slot number */ +#define AC_CVTMAP_CHAN (0xf<<4) /* converter channel number */ + +/* configuration default - 32bit */ +#define AC_DEFCFG_SEQUENCE (0xf<<0) +#define AC_DEFCFG_DEF_ASSOC (0xf<<4) +#define AC_DEFCFG_ASSOC_SHIFT 4 +#define AC_DEFCFG_MISC (0xf<<8) +#define AC_DEFCFG_MISC_SHIFT 8 +#define AC_DEFCFG_MISC_NO_PRESENCE (1<<0) +#define AC_DEFCFG_COLOR (0xf<<12) +#define AC_DEFCFG_COLOR_SHIFT 12 +#define AC_DEFCFG_CONN_TYPE (0xf<<16) +#define AC_DEFCFG_CONN_TYPE_SHIFT 16 +#define AC_DEFCFG_DEVICE (0xf<<20) +#define AC_DEFCFG_DEVICE_SHIFT 20 +#define AC_DEFCFG_LOCATION (0x3f<<24) +#define AC_DEFCFG_LOCATION_SHIFT 24 +#define AC_DEFCFG_PORT_CONN (0x3<<30) +#define AC_DEFCFG_PORT_CONN_SHIFT 30 + +/* Display pin's device list entry */ +#define AC_DE_PD (1<<0) +#define AC_DE_ELDV (1<<1) +#define AC_DE_IA (1<<2) + +/* device device types (0x0-0xf) */ +enum { + AC_JACK_LINE_OUT, + AC_JACK_SPEAKER, + AC_JACK_HP_OUT, + AC_JACK_CD, + AC_JACK_SPDIF_OUT, + AC_JACK_DIG_OTHER_OUT, + AC_JACK_MODEM_LINE_SIDE, + AC_JACK_MODEM_HAND_SIDE, + AC_JACK_LINE_IN, + AC_JACK_AUX, + AC_JACK_MIC_IN, + AC_JACK_TELEPHONY, + AC_JACK_SPDIF_IN, + AC_JACK_DIG_OTHER_IN, + AC_JACK_OTHER = 0xf, +}; + +/* jack connection types (0x0-0xf) */ +enum { + AC_JACK_CONN_UNKNOWN, + AC_JACK_CONN_1_8, + AC_JACK_CONN_1_4, + AC_JACK_CONN_ATAPI, + AC_JACK_CONN_RCA, + AC_JACK_CONN_OPTICAL, + AC_JACK_CONN_OTHER_DIGITAL, + AC_JACK_CONN_OTHER_ANALOG, + AC_JACK_CONN_DIN, + AC_JACK_CONN_XLR, + AC_JACK_CONN_RJ11, + AC_JACK_CONN_COMB, + AC_JACK_CONN_OTHER = 0xf, +}; + +/* jack colors (0x0-0xf) */ +enum { + AC_JACK_COLOR_UNKNOWN, + AC_JACK_COLOR_BLACK, + AC_JACK_COLOR_GREY, + AC_JACK_COLOR_BLUE, + AC_JACK_COLOR_GREEN, + AC_JACK_COLOR_RED, + AC_JACK_COLOR_ORANGE, + AC_JACK_COLOR_YELLOW, + AC_JACK_COLOR_PURPLE, + AC_JACK_COLOR_PINK, + AC_JACK_COLOR_WHITE = 0xe, + AC_JACK_COLOR_OTHER, +}; + +/* Jack location (0x0-0x3f) */ +/* common case */ +enum { + AC_JACK_LOC_NONE, + AC_JACK_LOC_REAR, + AC_JACK_LOC_FRONT, + AC_JACK_LOC_LEFT, + AC_JACK_LOC_RIGHT, + AC_JACK_LOC_TOP, + AC_JACK_LOC_BOTTOM, +}; +/* bits 4-5 */ +enum { + AC_JACK_LOC_EXTERNAL = 0x00, + AC_JACK_LOC_INTERNAL = 0x10, + AC_JACK_LOC_SEPARATE = 0x20, + AC_JACK_LOC_OTHER = 0x30, +}; +enum { + /* external on primary chasis */ + AC_JACK_LOC_REAR_PANEL = 0x07, + AC_JACK_LOC_DRIVE_BAY, + /* internal */ + AC_JACK_LOC_RISER = 0x17, + AC_JACK_LOC_HDMI, + AC_JACK_LOC_ATAPI, + /* others */ + AC_JACK_LOC_MOBILE_IN = 0x37, + AC_JACK_LOC_MOBILE_OUT, +}; + +/* Port connectivity (0-3) */ +enum { + AC_JACK_PORT_COMPLEX, + AC_JACK_PORT_NONE, + AC_JACK_PORT_FIXED, + AC_JACK_PORT_BOTH, +}; + +/* max. codec address */ +#define HDA_MAX_CODEC_ADDRESS 0x0f + +#endif /* __SOUND_HDA_VERBS_H */ diff --git a/include/sound/memalloc.h b/include/sound/memalloc.h index 5f73785..782d1df 100644 --- a/include/sound/memalloc.h +++ b/include/sound/memalloc.h @@ -149,13 +149,6 @@ int snd_dma_alloc_pages_fallback(int type, struct device *dev, size_t size, struct snd_dma_buffer *dmab); void snd_dma_free_pages(struct snd_dma_buffer *dmab); -/* buffer-preservation managements */ - -#define snd_dma_pci_buf_id(pci) (((unsigned int)(pci)->vendor << 16) | (pci)->device) - -size_t snd_dma_get_reserved_buf(struct snd_dma_buffer *dmab, unsigned int id); -int snd_dma_reserve_buf(struct snd_dma_buffer *dmab, unsigned int id); - /* basic memory allocation functions */ void *snd_malloc_pages(size_t size, gfp_t gfp_flags); void snd_free_pages(void *ptr, size_t size); diff --git a/include/sound/pcm.h b/include/sound/pcm.h index 84b10f9..4883499 100644 --- a/include/sound/pcm.h +++ b/include/sound/pcm.h @@ -381,7 +381,6 @@ struct snd_pcm_substream { struct pm_qos_request latency_pm_qos_req; /* pm_qos request */ size_t buffer_bytes_max; /* limit ring buffer size */ struct snd_dma_buffer dma_buffer; - unsigned int dma_buf_id; size_t dma_max; /* -- hardware operations -- */ const struct snd_pcm_ops *ops; @@ -901,6 +900,8 @@ extern const struct snd_pcm_hw_constraint_list snd_pcm_known_rates; int snd_pcm_limit_hw_rates(struct snd_pcm_runtime *runtime); unsigned int snd_pcm_rate_to_rate_bit(unsigned int rate); unsigned int snd_pcm_rate_bit_to_rate(unsigned int rate_bit); +unsigned int snd_pcm_rate_mask_intersect(unsigned int rates_a, + unsigned int rates_b); static inline void snd_pcm_set_runtime_buffer(struct snd_pcm_substream *substream, struct snd_dma_buffer *bufp) diff --git a/include/sound/pcm_params.h b/include/sound/pcm_params.h index 37ae12e..6b1c78f 100644 --- a/include/sound/pcm_params.h +++ b/include/sound/pcm_params.h @@ -354,4 +354,16 @@ params_period_bytes(const struct snd_pcm_hw_params *p) params_channels(p)) / 8; } +static inline int +params_width(const struct snd_pcm_hw_params *p) +{ + return snd_pcm_format_width(params_format(p)); +} + +static inline int +params_physical_width(const struct snd_pcm_hw_params *p) +{ + return snd_pcm_format_physical_width(params_format(p)); +} + #endif /* __SOUND_PCM_PARAMS_H */ diff --git a/include/sound/rcar_snd.h b/include/sound/rcar_snd.h index 12afab1..e147498 100644 --- a/include/sound/rcar_snd.h +++ b/include/sound/rcar_snd.h @@ -18,7 +18,7 @@ #define RSND_GEN1_ADG 1 #define RSND_GEN1_SSI 2 -#define RSND_GEN2_SRU 0 +#define RSND_GEN2_SCU 0 #define RSND_GEN2_ADG 1 #define RSND_GEN2_SSIU 2 #define RSND_GEN2_SSI 3 @@ -58,6 +58,7 @@ struct rsnd_ssi_platform_info { struct rsnd_scu_platform_info { u32 flags; + u32 convert_rate; /* sampling rate convert */ }; /* diff --git a/include/sound/soc-dai.h b/include/sound/soc-dai.h index 800c101..71f27c4 100644 --- a/include/sound/soc-dai.h +++ b/include/sound/soc-dai.h @@ -123,6 +123,8 @@ int snd_soc_dai_set_tristate(struct snd_soc_dai *dai, int tristate); int snd_soc_dai_digital_mute(struct snd_soc_dai *dai, int mute, int direction); +int snd_soc_dai_is_dummy(struct snd_soc_dai *dai); + struct snd_soc_dai_ops { /* * DAI clocking configuration, all optional. @@ -220,6 +222,8 @@ struct snd_soc_dai_driver { struct snd_soc_pcm_stream capture; struct snd_soc_pcm_stream playback; unsigned int symmetric_rates:1; + unsigned int symmetric_channels:1; + unsigned int symmetric_samplebits:1; /* probe ordering - for components with runtime dependencies */ int probe_order; @@ -244,6 +248,8 @@ struct snd_soc_dai { unsigned int capture_active:1; /* stream is in use */ unsigned int playback_active:1; /* stream is in use */ unsigned int symmetric_rates:1; + unsigned int symmetric_channels:1; + unsigned int symmetric_samplebits:1; struct snd_pcm_runtime *runtime; unsigned int active; unsigned char probed:1; @@ -258,6 +264,8 @@ struct snd_soc_dai { /* Symmetry data - only valid if symmetry is being enforced */ unsigned int rate; + unsigned int channels; + unsigned int sample_bits; /* parent platform/codec */ struct snd_soc_platform *platform; diff --git a/include/sound/soc-dapm.h b/include/sound/soc-dapm.h index 56ebdfc..68d92e3 100644 --- a/include/sound/soc-dapm.h +++ b/include/sound/soc-dapm.h @@ -412,6 +412,7 @@ int snd_soc_dapm_new_controls(struct snd_soc_dapm_context *dapm, int snd_soc_dapm_new_dai_widgets(struct snd_soc_dapm_context *dapm, struct snd_soc_dai *dai); int snd_soc_dapm_link_dai_widgets(struct snd_soc_card *card); +void snd_soc_dapm_connect_dai_link_widgets(struct snd_soc_card *card); int snd_soc_dapm_new_pcm(struct snd_soc_card *card, const struct snd_soc_pcm_stream *params, struct snd_soc_dapm_widget *source, diff --git a/include/sound/soc-dpcm.h b/include/sound/soc-dpcm.h index 047d657..2883a7a 100644 --- a/include/sound/soc-dpcm.h +++ b/include/sound/soc-dpcm.h @@ -11,6 +11,7 @@ #ifndef __LINUX_SND_SOC_DPCM_H #define __LINUX_SND_SOC_DPCM_H +#include <linux/slab.h> #include <linux/list.h> #include <sound/pcm.h> @@ -135,4 +136,25 @@ int soc_dpcm_be_digital_mute(struct snd_soc_pcm_runtime *fe, int mute); int soc_dpcm_debugfs_add(struct snd_soc_pcm_runtime *rtd); int soc_dpcm_runtime_update(struct snd_soc_card *); +int dpcm_path_get(struct snd_soc_pcm_runtime *fe, + int stream, struct snd_soc_dapm_widget_list **list_); +int dpcm_process_paths(struct snd_soc_pcm_runtime *fe, + int stream, struct snd_soc_dapm_widget_list **list, int new); +int dpcm_be_dai_startup(struct snd_soc_pcm_runtime *fe, int stream); +int dpcm_be_dai_shutdown(struct snd_soc_pcm_runtime *fe, int stream); +void dpcm_be_disconnect(struct snd_soc_pcm_runtime *fe, int stream); +void dpcm_clear_pending_state(struct snd_soc_pcm_runtime *fe, int stream); +int dpcm_be_dai_hw_free(struct snd_soc_pcm_runtime *fe, int stream); +int dpcm_be_dai_hw_params(struct snd_soc_pcm_runtime *fe, int tream); +int dpcm_be_dai_trigger(struct snd_soc_pcm_runtime *fe, int stream, int cmd); +int dpcm_be_dai_prepare(struct snd_soc_pcm_runtime *fe, int stream); +int dpcm_dapm_stream_event(struct snd_soc_pcm_runtime *fe, int dir, + int event); + +static inline void dpcm_path_put(struct snd_soc_dapm_widget_list **list) +{ + kfree(*list); +} + + #endif diff --git a/include/sound/soc.h b/include/sound/soc.h index 1f741cb..9a00147 100644 --- a/include/sound/soc.h +++ b/include/sound/soc.h @@ -334,9 +334,7 @@ struct snd_soc_jack_pin; #include <sound/soc-dapm.h> #include <sound/soc-dpcm.h> -#ifdef CONFIG_GPIOLIB struct snd_soc_jack_gpio; -#endif typedef int (*hw_write_t)(void *,const char* ,int); @@ -446,6 +444,17 @@ int snd_soc_jack_add_gpios(struct snd_soc_jack *jack, int count, struct snd_soc_jack_gpio *gpios); void snd_soc_jack_free_gpios(struct snd_soc_jack *jack, int count, struct snd_soc_jack_gpio *gpios); +#else +static inline int snd_soc_jack_add_gpios(struct snd_soc_jack *jack, int count, + struct snd_soc_jack_gpio *gpios) +{ + return 0; +} + +static inline void snd_soc_jack_free_gpios(struct snd_soc_jack *jack, int count, + struct snd_soc_jack_gpio *gpios) +{ +} #endif /* codec register bit access */ @@ -580,7 +589,6 @@ struct snd_soc_jack_zone { * to provide more complex checks (eg, reading an * ADC). */ -#ifdef CONFIG_GPIOLIB struct snd_soc_jack_gpio { unsigned int gpio; const char *name; @@ -594,7 +602,6 @@ struct snd_soc_jack_gpio { int (*jack_status_check)(void); }; -#endif struct snd_soc_jack { struct mutex mutex; @@ -879,6 +886,8 @@ struct snd_soc_dai_link { /* Symmetry requirements */ unsigned int symmetric_rates:1; + unsigned int symmetric_channels:1; + unsigned int symmetric_samplebits:1; /* Do not create a PCM for this DAI link (Backend link) */ unsigned int no_pcm:1; @@ -886,6 +895,10 @@ struct snd_soc_dai_link { /* This DAI link can route to other DAI links at runtime (Frontend)*/ unsigned int dynamic:1; + /* DPCM capture and Playback support */ + unsigned int dpcm_capture:1; + unsigned int dpcm_playback:1; + /* pmdown_time is ignored at stop */ unsigned int ignore_pmdown_time:1; @@ -1029,6 +1042,7 @@ struct snd_soc_pcm_runtime { /* Dynamic PCM BE runtime data */ struct snd_soc_dpcm_runtime dpcm[2]; + int fe_compr; long pmdown_time; unsigned char pop_wait:1; diff --git a/include/sound/spear_dma.h b/include/sound/spear_dma.h index 1b365bf..65aca51 100644 --- a/include/sound/spear_dma.h +++ b/include/sound/spear_dma.h @@ -29,7 +29,6 @@ struct spear_dma_data { dma_addr_t addr; u32 max_burst; enum dma_slave_buswidth addr_width; - bool (*filter)(struct dma_chan *chan, void *slave); }; #endif /* SPEAR_DMA_H */ diff --git a/include/uapi/sound/compress_params.h b/include/uapi/sound/compress_params.h index 602dc6c..165e705 100644 --- a/include/uapi/sound/compress_params.h +++ b/include/uapi/sound/compress_params.h @@ -57,6 +57,7 @@ #define MAX_NUM_CODECS 32 #define MAX_NUM_CODEC_DESCRIPTORS 32 #define MAX_NUM_BITRATES 32 +#define MAX_NUM_SAMPLE_RATES 32 /* Codecs are listed linearly to allow for extensibility */ #define SND_AUDIOCODEC_PCM ((__u32) 0x00000001) @@ -324,7 +325,8 @@ union snd_codec_options { /** struct snd_codec_desc - description of codec capabilities * @max_ch: Maximum number of audio channels - * @sample_rates: Sampling rates in Hz, use SNDRV_PCM_RATE_xxx for this + * @sample_rates: Sampling rates in Hz, use values like 48000 for this + * @num_sample_rates: Number of valid values in sample_rates array * @bit_rate: Indexed array containing supported bit rates * @num_bitrates: Number of valid values in bit_rate array * @rate_control: value is specified by SND_RATECONTROLMODE defines. @@ -346,7 +348,8 @@ union snd_codec_options { struct snd_codec_desc { __u32 max_ch; - __u32 sample_rates; + __u32 sample_rates[MAX_NUM_SAMPLE_RATES]; + __u32 num_sample_rates; __u32 bit_rate[MAX_NUM_BITRATES]; __u32 num_bitrates; __u32 rate_control; @@ -364,7 +367,8 @@ struct snd_codec_desc { * @ch_out: Number of output channels. In case of contradiction between * this field and the channelMode field, the channelMode field * overrides. - * @sample_rate: Audio sample rate of input data + * @sample_rate: Audio sample rate of input data in Hz, use values like 48000 + * for this. * @bit_rate: Bitrate of encoded data. May be ignored by decoders * @rate_control: Encoding rate control. See SND_RATECONTROLMODE defines. * Encoders may rely on profiles for quality levels. |