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authorGreg Kroah-Hartman <gregkh@linuxfoundation.org>2012-08-27 14:13:33 (GMT)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2012-08-27 14:13:33 (GMT)
commite372dc6c62bf0246a07f3291a26c562cc8659fbd (patch)
treec7039c1d1005b80e427761ba768d7697ae4a0b72 /kernel/irq
parent5d4121c04b3577e37e389b3553d442f44bb346d7 (diff)
parentfea7a08acb13524b47711625eebea40a0ede69a0 (diff)
downloadlinux-e372dc6c62bf0246a07f3291a26c562cc8659fbd.tar.xz
Merge 3.6-rc3 into tty-next
This picks up all of the different fixes in Linus's tree that we also need here. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'kernel/irq')
-rw-r--r--kernel/irq/manage.c15
1 files changed, 14 insertions, 1 deletions
diff --git a/kernel/irq/manage.c b/kernel/irq/manage.c
index 0a8e8f0..4c69326 100644
--- a/kernel/irq/manage.c
+++ b/kernel/irq/manage.c
@@ -944,6 +944,18 @@ __setup_irq(unsigned int irq, struct irq_desc *desc, struct irqaction *new)
}
/*
+ * Drivers are often written to work w/o knowledge about the
+ * underlying irq chip implementation, so a request for a
+ * threaded irq without a primary hard irq context handler
+ * requires the ONESHOT flag to be set. Some irq chips like
+ * MSI based interrupts are per se one shot safe. Check the
+ * chip flags, so we can avoid the unmask dance at the end of
+ * the threaded handler for those.
+ */
+ if (desc->irq_data.chip->flags & IRQCHIP_ONESHOT_SAFE)
+ new->flags &= ~IRQF_ONESHOT;
+
+ /*
* The following block of code has to be executed atomically
*/
raw_spin_lock_irqsave(&desc->lock, flags);
@@ -1017,7 +1029,8 @@ __setup_irq(unsigned int irq, struct irq_desc *desc, struct irqaction *new)
*/
new->thread_mask = 1 << ffz(thread_mask);
- } else if (new->handler == irq_default_primary_handler) {
+ } else if (new->handler == irq_default_primary_handler &&
+ !(desc->irq_data.chip->flags & IRQCHIP_ONESHOT_SAFE)) {
/*
* The interrupt was requested with handler = NULL, so
* we use the default primary handler for it. But it