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author | Abhilash Kesavan <a.kesavan@samsung.com> | 2015-01-27 05:48:22 (GMT) |
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committer | Eduardo Valentin <edubezval@gmail.com> | 2015-01-31 19:20:45 (GMT) |
commit | 6c247393cfdd6695717f80ff31f9fd9af8c2c525 (patch) | |
tree | 15133debdf0ce9d9b8fdacd650b6b52899d29434 /lib/notifier-error-inject.c | |
parent | 14ccc17a37c291172c557070f4faf77445494aff (diff) | |
download | linux-6c247393cfdd6695717f80ff31f9fd9af8c2c525.tar.xz |
thermal: exynos: Add TMU support for Exynos7 SoC
Add registers, bit fields and compatible strings for Exynos7 TMU
(Thermal Management Unit). Following are a few of the differences
in the Exynos7 TMU from earlier SoCs:
- 8 trigger levels
- Different bit offsets and more registers for the rising
and falling thresholds.
- New power down detection bit in the TMU_CONTROL register
which does not update the CURRENT_TEMP0 when tmu power down
is detected.
- Change in bit offset for the NEXT_DATA field of EMUL_CON
register. EMUL_CON register address has also changed.
- INTSTAT and INTCLEAR registers present in earlier SoCs
have been combined into one INTPEND register. The register
address for INTCLEAR and INTPEND is also different.
- Since there are 8 rising/falling interrupts as against
at most 4 in earlier SoCs the INTEN bit offsets are different.
- Multiple probe support which is handled by a TMU_CONTROL1
register (No support for this in the current patch).
This patch adds special clock support required only for Exynos7. It
also updates the "code_to_temp" prototype as Exynos7 has 9 bit
code-temp mapping.
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
Tested-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
Diffstat (limited to 'lib/notifier-error-inject.c')
0 files changed, 0 insertions, 0 deletions