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author | Thomas Petazzoni <thomas.petazzoni@free-electrons.com> | 2015-06-09 16:47:15 (GMT) |
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committer | Linus Walleij <linus.walleij@linaro.org> | 2015-06-10 12:00:54 (GMT) |
commit | 50a7d13d241081838c6cd12b1fdabc36838f9b4c (patch) | |
tree | f4aad06b6655ddc078037c2510619a7ef358542c /mm/readahead.c | |
parent | 9e05db29e2ac7f1fec1a4d15db8c419634290535 (diff) | |
download | linux-50a7d13d241081838c6cd12b1fdabc36838f9b4c.tar.xz |
pinctrl: mvebu: armada-xp: rename spi to spi0
After updating to the latest Armada XP datasheet, we discovered that
there is a second SPI bus accessible from the MPP pins, called 'spi1'.
In order to be consistent with other SoCs having two SPI busses, this
commit renames the functions of the first SPI bus to 'spi0' instead of
just 'spi'.
This commit obviously breaks the DT backward compatibility for the
people using the "spi" function name in their Device Tree.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'mm/readahead.c')
0 files changed, 0 insertions, 0 deletions