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author | Ezequiel Garcia <ezequiel.garcia@free-electrons.com> | 2013-08-12 17:14:48 (GMT) |
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committer | David Woodhouse <David.Woodhouse@intel.com> | 2013-08-30 20:34:51 (GMT) |
commit | cd9d11820f4232856d6254a29fbb9c4f51a981c2 (patch) | |
tree | 905bc413c07bc79bf0b6d72b974ee81c03e5d34a /samples | |
parent | c0f3b8643a6fa2461d70760ec49d21d2b031d611 (diff) | |
download | linux-cd9d11820f4232856d6254a29fbb9c4f51a981c2.tar.xz |
mtd: nand: pxa3xx: Handle ECC and DMA enable/disable properly
When ECC is not selected, the ECC enable bit must be cleared
in the NAND control register. Same applies to DMA.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Tested-by: Daniel Mack <zonque@gmail.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Diffstat (limited to 'samples')
0 files changed, 0 insertions, 0 deletions