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authorDylan Reid <dgreid@chromium.org>2014-03-18 05:08:49 (GMT)
committerMark Brown <broonie@linaro.org>2014-03-19 23:09:45 (GMT)
commit591d14f00796a4250d800d316e3db1fea8a57e20 (patch)
treed4dd85a397ed441ae610a50aef5ae7223955b56d /sound/firewire/dice-interface.h
parent38dbfb59d1175ef458d006556061adeaa8751b72 (diff)
downloadlinux-591d14f00796a4250d800d316e3db1fea8a57e20.tar.xz
ASoC: tegra: Use flat regcache
When using an rbtree cache, there can be allocations the first time a register is accessed. This can cause an attempt to schedule while atomic in the case that the regmap is using a spinlock. This could be fixed by either initializing all the registers or using a flat cache. The register maps for tegra30_ahub and tegra30_i2s are dense and don't save much from using a tree so convert them to flat. Tegra30 changes tested on Norrin, Tegra20 changes compile. Signed-off-by: Dylan Reid <dgreid@chromium.org> Tested-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Mark Brown <broonie@linaro.org>
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