diff options
| author | Zidan Wang <zidan.wang@freescale.com> | 2015-11-09 11:02:29 (GMT) |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2015-11-17 18:51:36 (GMT) |
| commit | 9cc58712358cbfe51248ef369fc50671149b60fc (patch) | |
| tree | a6406d4c67b87037d062678474d705c29e6105af /sound/soc/fsl | |
| parent | 8005c49d9aea74d382f474ce11afbbc7d7130bec (diff) | |
| download | linux-9cc58712358cbfe51248ef369fc50671149b60fc.tar.xz | |
ASoC: fsl-sai: don't set bclk for Tx/Rx Synchronous with another SAI mode
In fsl_sai_set_bclk function, we should not set bclk for Tx/Rx Synchronous
with another SAI mode.
Signed-off-by: Zidan Wang <zidan.wang@freescale.com>
Acked-by: Nicolin Chen <nicoleotsuka@gmail.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'sound/soc/fsl')
| -rw-r--r-- | sound/soc/fsl/fsl_sai.c | 16 |
1 files changed, 14 insertions, 2 deletions
diff --git a/sound/soc/fsl/fsl_sai.c b/sound/soc/fsl/fsl_sai.c index a4435f5..7e421a9 100644 --- a/sound/soc/fsl/fsl_sai.c +++ b/sound/soc/fsl/fsl_sai.c @@ -354,13 +354,25 @@ static int fsl_sai_set_bclk(struct snd_soc_dai *dai, bool tx, u32 freq) return -EINVAL; } - if ((tx && sai->synchronous[TX]) || (!tx && !sai->synchronous[RX])) { + /* + * 1) For Asynchronous mode, we must set RCR2 register for capture, and + * set TCR2 register for playback. + * 2) For Tx sync with Rx clock, we must set RCR2 register for playback + * and capture. + * 3) For Rx sync with Tx clock, we must set TCR2 register for playback + * and capture. + * 4) For Tx and Rx are both Synchronous with another SAI, we just + * ignore it. + */ + if ((sai->synchronous[TX] && !sai->synchronous[RX]) || + (!tx && !sai->synchronous[RX])) { regmap_update_bits(sai->regmap, FSL_SAI_RCR2, FSL_SAI_CR2_MSEL_MASK, FSL_SAI_CR2_MSEL(sai->mclk_id[tx])); regmap_update_bits(sai->regmap, FSL_SAI_RCR2, FSL_SAI_CR2_DIV_MASK, savediv - 1); - } else { + } else if ((sai->synchronous[RX] && !sai->synchronous[TX]) || + (tx && !sai->synchronous[TX])) { regmap_update_bits(sai->regmap, FSL_SAI_TCR2, FSL_SAI_CR2_MSEL_MASK, FSL_SAI_CR2_MSEL(sai->mclk_id[tx])); |