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authorDave Airlie <airlied@redhat.com>2013-04-16 03:03:47 (GMT)
committerDave Airlie <airlied@redhat.com>2013-04-16 03:03:47 (GMT)
commit28184f22178ec9cfadd72e37e99921fdefa95f89 (patch)
tree57f43b9701292c06d5356240408ead77b83f9c0f /tools
parent9131d3d87bf7c8cfc9bdc3d3d927ec3967f0e9a6 (diff)
parentbae3699182027525d92b97d904578a533264b242 (diff)
downloadlinux-28184f22178ec9cfadd72e37e99921fdefa95f89.tar.xz
Merge tag 'drm-intel-next-2013-04-06' of git://people.freedesktop.org/~danvet/drm-intel into drm-next
Daniel writes: Since I expect Linus to open the merge window in about a week I guess this is the last i915 feature pull for 3.10. Highlights: Updated testing tree for -next. Highlights: - Corner case fixes discovered with static analyzers (Damien). - More fixes to combat unclaimed register errors on Haswell (Paulo). - Some small fixes to the gpu turbo code (Rodrigo+Ben), Ben has more fixes for overclocking support pending. - More prep work for fastboot from Chris. - VT-switchless suspend/resume from Jesse. - The prep work of Egbert Eich's hpd irq storm handling. Hopefully we can squeeze in the actual storm handling code for 3.10 ... - More convenience helpers for Imre's sg iterator. Core parts acked by Andrew Morton. - A bit of backlight code cleanup from Jani. - Fixed ilk gpu reset (Jesse). - Reduced color range handling fixes for VLV (Ville). The big item here is though the introduction of pipe_config to properly pre-compute the desired modeset state before touching the hw. Together with some very basic support to read out the current config from the hw and compare the state with the sw tracking. This is all prep work for more reliable fastboot, atomic modesets and other cool features. Stuff converted to the new world includes: - Most simple pipe attributes (reduce color range, pixel multiplier). - Pipe bpp/dither handling. - Some convenience flags like ->has_pch_encoder to simplify the code flow. - (Almost) DP clock handling, had to be reverted since part of a prep patch was lost in rebasing ... Expect a lot of patches for this throughout 3.11, there's tons of work till we have all state properly tracked for fastbooting to woExpect a lot of patches for this throughout 3.11, there's tons of work till we have all state properly tracked for fastbooting to work. For 3.10 I have a bunch of fixes queued up and I plan to send them all out at the end of this week. I need to shuffle patches in my -next queue a bit so that we don't but feature-y stuff in there, too. The main thing I'd like to sneak in is Egbert's hpd irq storm handling, which should be pretty low-risk since all the infrastructure work has landed already. I also have the oops fix pending, but that only mustered review before the w/e and giving how hairy that part of our modeset code is, I want to give it some more testing before forwarding. Note: annarchy.fd.o seems to run out of disk space, so couldn't push the usual for-airlied branch. Tag should work though. Note 2: I've had to do a backmerge since conflicts grew too ugly, but the upstream -rc I've backmerged is already in your drm-next. * tag 'drm-intel-next-2013-04-06' of git://people.freedesktop.org/~danvet/drm-intel: (75 commits) drm/i915: info level for simulated gpu hang dmesg notice drm/i915: revert eDP bpp clamping code changes Revert "drm/i915: fix DP get_hw_state return value" drm/i915: Don't use the HDMI port color range bit on Valleyview drm/i915: Set PIPECONF color range bit on Valleyview drm/i915: extract i9xx_set_pipeconf drm/i915: Add no-lvds quirk for Fujitsu Esprimo Q900 drm/i915: create pipe_config->dpll for clock state drm/i915: hw readout support for ->has_pch_encoders drm/i915: add hw state readout/checking for pipe_config drm/i915: rip out superflous is_dp&is_cpu_edp tracking drm/i915: remove leaky eDP functions drm/i915: track dp target_clock in pipe_config drm/i915: move dp_m_n computation to dp_encoder->compute_config drm/i915: clear up the fdi/dp set_m_n confusion drm/i915: Fix sdvo connector get_hw_state function drm/i915: drop DPFLIPSTAT enables on VLV v3 drm/i915: add Punit read/write routines for VLV v2 drm/i915: panel power sequencing for VLV eDP v2 drm/i915/dp: fix up VLV DP handling v2 ...
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