diff options
-rw-r--r-- | drivers/staging/rtl8192e/Makefile | 3 | ||||
-rw-r--r-- | drivers/staging/rtl8192e/r8190P_rtl8256.c | 4 | ||||
-rw-r--r-- | drivers/staging/rtl8192e/r8192E_dev.c | 16 | ||||
-rw-r--r-- | drivers/staging/rtl8192e/r8192E_hw.h | 2 | ||||
-rw-r--r-- | drivers/staging/rtl8192e/r8192E_phy.c | 32 | ||||
-rw-r--r-- | drivers/staging/rtl8192e/r8192E_phy.h | 19 | ||||
-rw-r--r-- | drivers/staging/rtl8192e/rtl_core.c | 2 | ||||
-rw-r--r-- | drivers/staging/rtl8192e/rtl_dm.c | 136 | ||||
-rw-r--r-- | drivers/staging/rtl8192e/rtl_wx.c | 2 |
9 files changed, 10 insertions, 206 deletions
diff --git a/drivers/staging/rtl8192e/Makefile b/drivers/staging/rtl8192e/Makefile index 7cf7a52..594abc0 100644 --- a/drivers/staging/rtl8192e/Makefile +++ b/drivers/staging/rtl8192e/Makefile @@ -1,6 +1,3 @@ -NIC_SELECT = RTL8192E - -ccflags-y += -DRTL8192E ccflags-y += -DEEPROM_OLD_FORMAT_SUPPORT=1 ccflags-y += -DUSE_FW_SOURCE_IMG_FILE ccflags-y += -DENABLE_GPIO_RADIO_CTL diff --git a/drivers/staging/rtl8192e/r8190P_rtl8256.c b/drivers/staging/rtl8192e/r8190P_rtl8256.c index d4ba36e..b658700 100644 --- a/drivers/staging/rtl8192e/r8190P_rtl8256.c +++ b/drivers/staging/rtl8192e/r8190P_rtl8256.c @@ -187,7 +187,6 @@ void PHY_SetRF8256CCKTxPower(struct net_device* dev, u8 powerlevel) { u32 TxAGC=0; struct r8192_priv *priv = rtllib_priv(dev); - #ifdef RTL8192E TxAGC = powerlevel; if (priv->bDynamicTxLowPower == true) @@ -200,14 +199,12 @@ void PHY_SetRF8256CCKTxPower(struct net_device* dev, u8 powerlevel) if (TxAGC > 0x24) TxAGC = 0x24; rtl8192_setBBreg(dev, rTxAGC_CCK_Mcs32, bTxAGCRateCCK, TxAGC); - #endif } void PHY_SetRF8256OFDMTxPower(struct net_device* dev, u8 powerlevel) { struct r8192_priv *priv = rtllib_priv(dev); -#ifdef RTL8192E u32 writeVal, powerBase0, powerBase1, writeVal_tmp; u8 index = 0; u16 RegOffset[6] = {0xe00, 0xe04, 0xe10, 0xe14, 0xe18, 0xe1c}; @@ -251,6 +248,5 @@ void PHY_SetRF8256OFDMTxPower(struct net_device* dev, u8 powerlevel) rtl8192_setBBreg(dev, RegOffset[index], 0x7f7f7f7f, writeVal); } -#endif return; } diff --git a/drivers/staging/rtl8192e/r8192E_dev.c b/drivers/staging/rtl8192e/r8192E_dev.c index 3ced5d2..0e66d26 100644 --- a/drivers/staging/rtl8192e/r8192E_dev.c +++ b/drivers/staging/rtl8192e/r8192E_dev.c @@ -322,10 +322,8 @@ rtl8192e_SetHwReg(struct net_device *dev,u8 variable,u8* val) case HW_VAR_RF_TIMING: { -#ifdef RTL8192E u8 Rf_Timing = *((u8*)val); write_nic_byte(dev, rFPGA0_RFTiming1, Rf_Timing); -#endif } break; @@ -340,9 +338,7 @@ static void rtl8192_read_eeprom_info(struct net_device* dev) struct r8192_priv *priv = rtllib_priv(dev); u8 tempval; -#ifdef RTL8192E u8 ICVer8192, ICVer8256; -#endif u16 i,usValue, IC_Version; u16 EEPROMId; u8 bMac_Tmp_Addr[6] = {0x00, 0xe0, 0x4c, 0x00, 0x00, 0x01}; @@ -773,9 +769,7 @@ bool rtl8192_adapter_start(struct net_device *dev) u32 ulRegRead; bool rtStatus = true; u8 tmpvalue; -#ifdef RTL8192E u8 ICVersion,SwitchingRegulatorOutput; -#endif bool bfirmwareok = true; u32 tmpRegA, tmpRegC, TempCCk; int i = 0; @@ -791,13 +785,11 @@ bool rtl8192_adapter_start(struct net_device *dev) start: rtl8192_pci_resetdescring(dev); priv->Rf_Mode = RF_OP_By_SW_3wire; -#ifdef RTL8192E if (priv->ResetProgress == RESET_TYPE_NORESET) { write_nic_byte(dev, ANAPAR, 0x37); mdelay(500); } -#endif priv->pFirmware->firmware_status = FW_STATUS_0_INIT; if (priv->RegRfOff == true) @@ -815,7 +807,6 @@ start: write_nic_dword(dev, CPU_GEN, ulRegRead); -#ifdef RTL8192E ICVersion = read_nic_byte(dev, IC_VERRSION); if (ICVersion >= 0x4) @@ -828,7 +819,6 @@ start: write_nic_byte(dev, SWREGULATOR, 0xb8); } } -#endif RT_TRACE(COMP_INIT, "BB Config Start!\n"); rtStatus = rtl8192_BBConfig(dev); if (rtStatus != true) @@ -967,9 +957,7 @@ start: rtl8192_setBBreg(dev, rFPGA0_RFMOD, bCCKEn, 0x1); rtl8192_setBBreg(dev, rFPGA0_RFMOD, bOFDMEn, 0x1); -#ifdef RTL8192E write_nic_byte(dev, 0x87, 0x0); -#endif if (priv->RegRfOff == true) { RT_TRACE((COMP_INIT|COMP_RF|COMP_POWER), "%s(): Turn off RF for RegRfOff ----------\n",__func__); @@ -2057,9 +2045,7 @@ void rtl8192_halt_adapter(struct net_device *dev, bool reset) { mdelay(150); -#ifdef RTL8192E - priv->bHwRfOffAction = 2; -#endif + priv->bHwRfOffAction = 2; if (!priv->rtllib->bSupportRemoteWakeUp) { diff --git a/drivers/staging/rtl8192e/r8192E_hw.h b/drivers/staging/rtl8192e/r8192E_hw.h index 6c16888..ec1e746 100644 --- a/drivers/staging/rtl8192e/r8192E_hw.h +++ b/drivers/staging/rtl8192e/r8192E_hw.h @@ -70,13 +70,11 @@ typedef enum _BaseBand_Config_Type { #define EEPROM_Default_TxPower 0x1010 #define EEPROM_ICVersion_ChannelPlan 0x7C #define EEPROM_Customer_ID 0x7B -#ifdef RTL8192E #define EEPROM_RFInd_PowerDiff 0x28 #define EEPROM_ThermalMeter 0x29 #define EEPROM_TxPwDiff_CrystalCap 0x2A #define EEPROM_TxPwIndex_CCK 0x2C #define EEPROM_TxPwIndex_OFDM_24G 0x3A -#endif #define EEPROM_Default_TxPowerLevel 0x10 #define EEPROM_IC_VER 0x7d #define EEPROM_CRC 0x7e diff --git a/drivers/staging/rtl8192e/r8192E_phy.c b/drivers/staging/rtl8192e/r8192E_phy.c index defd697..d03eb60 100644 --- a/drivers/staging/rtl8192e/r8192E_phy.c +++ b/drivers/staging/rtl8192e/r8192E_phy.c @@ -27,9 +27,7 @@ #include "dot11d.h" #endif -#ifdef RTL8192E #include "r8192E_hwimg.h" -#endif static u32 RF_CHANNEL_TABLE_ZEBRA[] = { 0, @@ -67,7 +65,6 @@ u8 rtl8192_phy_CheckIsLegalRFPath(struct net_device* dev, u32 eRFPath) { u8 ret = 1; struct r8192_priv *priv = rtllib_priv(dev); - #ifdef RTL8192E if (priv->rf_type == RF_2T4R) ret = 0; else if (priv->rf_type == RF_1T2R) @@ -77,7 +74,6 @@ u8 rtl8192_phy_CheckIsLegalRFPath(struct net_device* dev, u32 eRFPath) else if (eRFPath == RF90_PATH_C || eRFPath == RF90_PATH_D) ret = 0; } - #endif return ret; } void rtl8192_setBBreg(struct net_device* dev, u32 dwRegAddr, u32 dwBitMask, u32 dwData) @@ -115,9 +111,7 @@ u32 rtl8192_phy_RFSerialRead(struct net_device* dev, RF90_RADIO_PATH_E eRFPath, if (priv->rf_chip == RF_8256) { - #ifdef RTL8192E rtl8192_setBBreg(dev, rFPGA0_AnalogParameter4, 0xf00, 0x0); - #endif if (Offset >= 31) { priv->RfReg0Value[eRFPath] |= 0x140; @@ -160,9 +154,7 @@ u32 rtl8192_phy_RFSerialRead(struct net_device* dev, RF90_RADIO_PATH_E eRFPath, bMaskDWord, (priv->RfReg0Value[eRFPath] << 16)); - #ifdef RTL8192E rtl8192_setBBreg(dev, rFPGA0_AnalogParameter4, 0x300, 0x3); - #endif } @@ -179,10 +171,7 @@ void rtl8192_phy_RFSerialWrite(struct net_device* dev, RF90_RADIO_PATH_E eRFPath Offset &= 0x3f; if (priv->rf_chip == RF_8256) { - - #ifdef RTL8192E rtl8192_setBBreg(dev, rFPGA0_AnalogParameter4, 0xf00, 0x0); - #endif if (Offset >= 31) { @@ -225,9 +214,7 @@ void rtl8192_phy_RFSerialWrite(struct net_device* dev, RF90_RADIO_PATH_E eRFPath bMaskDWord, (priv->RfReg0Value[eRFPath] << 16)); } - #ifdef RTL8192E rtl8192_setBBreg(dev, rFPGA0_AnalogParameter4, 0x300, 0x3); - #endif } return; @@ -240,10 +227,8 @@ void rtl8192_phy_SetRFReg(struct net_device* dev, RF90_RADIO_PATH_E eRFPath, u32 if (!rtl8192_phy_CheckIsLegalRFPath(dev, eRFPath)) return; -#ifdef RTL8192E if (priv->rtllib->eRFPowerState != eRfOn && !priv->being_init_adapter) return; -#endif RT_TRACE(COMP_PHY, "FW RF CTRL is not ready now\n"); if (priv->Rf_Mode == RF_OP_By_FW) @@ -281,10 +266,8 @@ u32 rtl8192_phy_QueryRFReg(struct net_device* dev, RF90_RADIO_PATH_E eRFPath, u3 struct r8192_priv *priv = rtllib_priv(dev); if (!rtl8192_phy_CheckIsLegalRFPath(dev, eRFPath)) return 0; -#ifdef RTL8192E if (priv->rtllib->eRFPowerState != eRfOn && !priv->being_init_adapter) return 0; -#endif down(&priv->rf_sem); if (priv->Rf_Mode == RF_OP_By_FW) { @@ -655,11 +638,8 @@ bool rtl8192_BB_Config_ParaFile(struct net_device* dev) (bXBTxAGC|bXCTxAGC|bXDTxAGC), dwRegValue); - #ifdef RTL8192E dwRegValue = priv->CrystalCap; rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, bXtalCap92x, dwRegValue); - #endif - } return rtStatus; @@ -675,7 +655,6 @@ bool rtl8192_BBConfig(struct net_device* dev) void rtl8192_phy_getTxPower(struct net_device* dev) { struct r8192_priv *priv = rtllib_priv(dev); - #ifdef RTL8192E priv->MCSTxPowerLevelOriginalOffset[0] = read_nic_dword(dev, rTxAGC_Rate18_06); priv->MCSTxPowerLevelOriginalOffset[1] = @@ -688,7 +667,6 @@ void rtl8192_phy_getTxPower(struct net_device* dev) read_nic_dword(dev, rTxAGC_Mcs11_Mcs08); priv->MCSTxPowerLevelOriginalOffset[5] = read_nic_dword(dev, rTxAGC_Mcs15_Mcs12); - #endif priv->DefaultInitialGain[0] = read_nic_byte(dev, rOFDM0_XAAGCCore1); priv->DefaultInitialGain[1] = read_nic_byte(dev, rOFDM0_XBAGCCore1); @@ -1208,9 +1186,7 @@ static void CCK_Tx_Power_Track_BW_Switch_ThermalMeter(struct net_device *dev) static void CCK_Tx_Power_Track_BW_Switch(struct net_device *dev) { -#ifdef RTL8192E struct r8192_priv *priv = rtllib_priv(dev); -#endif if (priv->IC_Cut >= IC_VersionCut_D) CCK_Tx_Power_Track_BW_Switch_TSSI(dev); @@ -1271,9 +1247,7 @@ void rtl8192_SetBWModeWorkItem(struct net_device *dev) else CCK_Tx_Power_Track_BW_Switch(dev); - #ifdef RTL8192E rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x00100000, 1); - #endif break; case HT_CHANNEL_WIDTH_20_40: @@ -1293,9 +1267,7 @@ void rtl8192_SetBWModeWorkItem(struct net_device *dev) rtl8192_setBBreg(dev, rOFDM1_LSTF, 0xC00, priv->nCur40MhzPrimeSC); - #ifdef RTL8192E rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x00100000, 0); - #endif break; default: RT_TRACE(COMP_ERR, "SetChannelBandwidth819xUsb(): unknown Bandwidth: %#X\n" ,priv->CurrentChannelBW); @@ -1427,7 +1399,6 @@ void InitialGain819xPci(struct net_device *dev, u8 Operation) } } -#if defined RTL8192E extern void PHY_SetRtl8192eRfOff(struct net_device* dev ) { @@ -1442,7 +1413,6 @@ PHY_SetRtl8192eRfOff(struct net_device* dev ) write_nic_byte(dev, ANAPAR_FOR_8192PciE, 0x07); } -#endif bool SetRFPowerState8190( @@ -1451,9 +1421,7 @@ SetRFPowerState8190( ) { struct r8192_priv *priv = rtllib_priv(dev); -#if defined RTL8192E PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->rtllib->PowerSaveControl)); -#endif bool bResult = true; u8 i = 0, QueueID = 0; struct rtl8192_tx_ring *ring = NULL; diff --git a/drivers/staging/rtl8192e/r8192E_phy.h b/drivers/staging/rtl8192e/r8192E_phy.h index fe900aa..d6020c0 100644 --- a/drivers/staging/rtl8192e/r8192E_phy.h +++ b/drivers/staging/rtl8192e/r8192E_phy.h @@ -25,7 +25,6 @@ #define MAX_RFDEPENDCMD_CNT 16 #define MAX_POSTCMD_CNT 16 -#ifdef RTL8192E #define AGCTAB_ArrayLength AGCTAB_ArrayLengthPciE #define MACPHY_ArrayLength MACPHY_ArrayLengthPciE #define RadioA_ArrayLength RadioA_ArrayLengthPciE @@ -45,11 +44,10 @@ #define Rtl819XAGCTAB_Array Rtl8192PciEAGCTAB_Array #define Rtl819XPHY_REGArray Rtl8192PciEPHY_REGArray #define Rtl819XPHY_REG_1T2RArray Rtl8192PciEPHY_REG_1T2RArray -#endif -typedef enum _SwChnlCmdID{ +typedef enum _SwChnlCmdID { CmdID_End, CmdID_SetTxPowerLevel, CmdID_BBRegWrite10, @@ -57,15 +55,15 @@ typedef enum _SwChnlCmdID{ CmdID_WritePortUshort, CmdID_WritePortUchar, CmdID_RF_WriteReg, -}SwChnlCmdID; +} SwChnlCmdID; /*--------------------------------Define structure--------------------------------*/ -typedef struct _SwChnlCmd{ +typedef struct _SwChnlCmd { SwChnlCmdID CmdID; u32 Para1; u32 Para2; u32 msDelay; -}__attribute__ ((packed)) SwChnlCmd; +} __attribute__ ((packed)) SwChnlCmd; extern u32 rtl819XMACPHY_Array_PG[]; extern u32 rtl819XPHY_REG_1T2RArray[]; @@ -75,13 +73,13 @@ extern u32 rtl819XRadioB_Array[]; extern u32 rtl819XRadioC_Array[]; extern u32 rtl819XRadioD_Array[]; -typedef enum _HW90_BLOCK{ +typedef enum _HW90_BLOCK { HW90_BLOCK_MAC = 0, HW90_BLOCK_PHY0 = 1, HW90_BLOCK_PHY1 = 2, HW90_BLOCK_RF = 3, HW90_BLOCK_MAXIMUM = 4, -}HW90_BLOCK_E, *PHW90_BLOCK_E; +} HW90_BLOCK_E, *PHW90_BLOCK_E; typedef enum _RF90_RADIO_PATH{ RF90_PATH_A = 0, @@ -120,10 +118,7 @@ extern void rtl8192_SwChnl_WorkItem(struct net_device *dev); extern void rtl8192_SetBWModeWorkItem(struct net_device *dev); extern void InitialGain819xPci(struct net_device *dev, u8 Operation); -#if defined RTL8192E -extern void -PHY_SetRtl8192eRfOff(struct net_device* dev ); -#endif +extern void PHY_SetRtl8192eRfOff(struct net_device *dev); bool SetRFPowerState( diff --git a/drivers/staging/rtl8192e/rtl_core.c b/drivers/staging/rtl8192e/rtl_core.c index 5dbf374..d8504e4 100644 --- a/drivers/staging/rtl8192e/rtl_core.c +++ b/drivers/staging/rtl8192e/rtl_core.c @@ -2876,11 +2876,9 @@ int rtl8192_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) setKey(dev, ipw->u.crypt.idx, ipw->u.crypt.idx, ieee->pairwise_key_type, (u8*)ieee->ap_mac_addr, 0, key); } } -#ifdef RTL8192E if ((ieee->pairwise_key_type == KEY_TYPE_CCMP) && ieee->pHTInfo->bCurrentHTSupport){ write_nic_byte(dev, 0x173, 1); } -#endif } else diff --git a/drivers/staging/rtl8192e/rtl_dm.c b/drivers/staging/rtl8192e/rtl_dm.c index a738f66..dba17a1 100644 --- a/drivers/staging/rtl8192e/rtl_dm.c +++ b/drivers/staging/rtl8192e/rtl_dm.c @@ -490,120 +490,6 @@ static void dm_bandwidth_autoswitch (struct net_device * dev) } } -#ifdef Rtl8192SE -u32 OFDMSwingTable[OFDM_Table_Length] = { - 0x7f8001fe, - 0x788001e2, - 0x71c001c7, - 0x6b8001ae, - 0x65400195, - 0x5fc0017f, - 0x5a400169, - 0x55400155, - 0x50800142, - 0x4c000130, - 0x47c0011f, - 0x43c0010f, - 0x40000100, - 0x3c8000f2, - 0x390000e4, - 0x35c000d7, - 0x32c000cb, - 0x300000c0, - 0x2d4000b5, - 0x2ac000ab, - 0x288000a2, - 0x26000098, - 0x24000090, - 0x22000088, - 0x20000080, - 0x1e400079, - 0x1c800072, - 0x1b00006c, - 0x19800066, - 0x18000060, - 0x16c0005b, - 0x15800056, - 0x14400051, - 0x1300004c, - 0x12000048, - 0x11000044, - 0x10000040, -}; - -u8 CCKSwingTable_Ch1_Ch13[CCK_Table_length][8] = { - {0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04}, - {0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04}, - {0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03}, - {0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03}, - {0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03}, - {0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03}, - {0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03}, - {0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03}, - {0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02}, - {0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02}, - {0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02}, - {0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02}, - {0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02}, - {0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02}, - {0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02}, - {0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02}, - {0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01}, - {0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02}, - {0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01}, - {0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, - {0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, - {0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01}, - {0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01}, - {0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01}, - {0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01}, - {0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01}, - {0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01}, - {0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01}, - {0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01}, - {0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01}, - {0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01}, - {0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01}, - {0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01} -}; - - -u8 CCKSwingTable_Ch14[CCK_Table_length][8] = { - {0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00}, - {0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00}, - {0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00}, - {0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00}, - {0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00}, - {0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00}, - {0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00}, - {0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00}, - {0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00}, - {0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00}, - {0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00}, - {0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00}, - {0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00}, - {0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00}, - {0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00}, - {0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00}, - {0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00}, - {0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00}, - {0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00}, - {0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, - {0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, - {0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00}, - {0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00}, - {0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, - {0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, - {0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00}, - {0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, - {0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, - {0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, - {0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, - {0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, - {0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, - {0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00} -}; -#elif defined RTL8192E static u32 OFDMSwingTable[OFDM_Table_Length] = { 0x7f8001fe, 0x71c001c7, @@ -654,7 +540,6 @@ static u8 CCKSwingTable_Ch14[CCK_Table_length][8] = { {0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, {0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00} }; -#endif #define Pw_Track_Flag 0x11d #define Tssi_Mea_Value 0x13c #define Tssi_Report_Value1 0x134 @@ -709,7 +594,6 @@ static void dm_TXPowerTrackingCallback_TSSI(struct net_device * dev) write_nic_byte(dev, FW_Busy_Flag, 0); return; } -#ifdef RTL8192E if ((priv->rtllib->eRFPowerState != eRfOn)) { RT_TRACE(COMP_POWER_TRACKING, "we are in power save, so return\n"); @@ -718,7 +602,6 @@ static void dm_TXPowerTrackingCallback_TSSI(struct net_device * dev) return; } -#endif continue; } @@ -818,7 +701,6 @@ static void dm_TXPowerTrackingCallback_TSSI(struct net_device * dev) else { { -#ifdef RTL8192E { if (priv->rfa_txpowertrackingindex > 0) { @@ -832,7 +714,6 @@ static void dm_TXPowerTrackingCallback_TSSI(struct net_device * dev) else rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance, bMaskDWord, priv->txbbgain_table[4].txbbgain_value); } -#endif } } @@ -859,7 +740,6 @@ static void dm_TXPowerTrackingCallback_TSSI(struct net_device * dev) else { { -#ifdef RTL8192E { if (priv->rfa_txpowertrackingindex < (TxBBGainTableLength - 1)) { @@ -870,7 +750,6 @@ static void dm_TXPowerTrackingCallback_TSSI(struct net_device * dev) else rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance, bMaskDWord, priv->txbbgain_table[TxBBGainTableLength - 1].txbbgain_value); } -#endif } } } @@ -879,10 +758,8 @@ static void dm_TXPowerTrackingCallback_TSSI(struct net_device * dev) = priv->rfa_txpowertrackingindex - priv->rfa_txpowertracking_default; }else{ { -#ifdef RTL8192E priv->CCKPresentAttentuation_difference = priv->rfa_txpowertrackingindex_real - priv->rfa_txpowertracking_default; -#endif } } @@ -941,7 +818,6 @@ static void dm_TXPowerTrackingCallback_TSSI(struct net_device * dev) write_nic_byte(dev, Pw_Track_Flag, 0); } -#ifdef RTL8192E static void dm_TXPowerTrackingCallback_ThermalMeter(struct net_device * dev) { #define ThermalMeterVal 9 @@ -1048,7 +924,6 @@ static void dm_TXPowerTrackingCallback_ThermalMeter(struct net_device * dev) } priv->txpower_count = 0; } -#endif void dm_txpower_trackingcallback(void *data) { @@ -1694,7 +1569,7 @@ static void dm_CCKTxPowerAdjust_TSSI(struct net_device *dev, bool bInCH14) } -#ifdef RTL8192E + static void dm_CCKTxPowerAdjust_ThermalMeter(struct net_device *dev, bool bInCH14) { u32 TempVal; @@ -1749,7 +1624,6 @@ static void dm_CCKTxPowerAdjust_ThermalMeter(struct net_device *dev, bool bInCH rCCK0_DebugPort, TempVal); } } -#endif extern void dm_cck_txpower_adjust( struct net_device *dev, @@ -2834,7 +2708,6 @@ static void dm_check_pbc_gpio(struct net_device *dev) { } -#ifdef RTL8192E extern void dm_CheckRfCtrlGPIO(void *data) { @@ -2902,7 +2775,7 @@ extern void dm_CheckRfCtrlGPIO(void *data) } } -#endif + void dm_rf_pathcheck_workitemcallback(void *data) { struct r8192_priv *priv = container_of_dwork_rsl(data,struct r8192_priv,rfpath_check_wq); @@ -3364,10 +3237,7 @@ static void dm_EndSWFsync(struct net_device *dev) } priv->ContiuneDiffCount = 0; -#ifdef RTL8192E write_nic_dword(dev, rOFDM0_RxDetector2, 0x465c52cd); -#endif - } static void dm_StartSWFsync(struct net_device *dev) @@ -3403,9 +3273,7 @@ static void dm_StartSWFsync(struct net_device *dev) priv->fsync_timer.expires = jiffies + MSECS(priv->rtllib->fsync_time_interval); add_timer(&priv->fsync_timer); -#ifdef RTL8192E write_nic_dword(dev, rOFDM0_RxDetector2, 0x465c12cd); -#endif } diff --git a/drivers/staging/rtl8192e/rtl_wx.c b/drivers/staging/rtl8192e/rtl_wx.c index 673382b..910a375 100644 --- a/drivers/staging/rtl8192e/rtl_wx.c +++ b/drivers/staging/rtl8192e/rtl_wx.c @@ -1066,11 +1066,9 @@ static int r8192_wx_set_enc_ext(struct net_device *dev, } else { - #ifdef RTL8192E if ((ieee->pairwise_key_type == KEY_TYPE_CCMP) && ieee->pHTInfo->bCurrentHTSupport){ write_nic_byte(dev, 0x173, 1); } - #endif setKey( dev, 4, idx, |