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-rw-r--r--Documentation/devicetree/bindings/clock/sunxi.txt22
1 files changed, 11 insertions, 11 deletions
diff --git a/Documentation/devicetree/bindings/clock/sunxi.txt b/Documentation/devicetree/bindings/clock/sunxi.txt
index b23cfbd..20b8479 100644
--- a/Documentation/devicetree/bindings/clock/sunxi.txt
+++ b/Documentation/devicetree/bindings/clock/sunxi.txt
@@ -6,14 +6,14 @@ This binding uses the common clock binding[1].
Required properties:
- compatible : shall be one of the following:
- "allwinner,sunxi-osc-clk" - for a gatable oscillator
- "allwinner,sunxi-pll1-clk" - for the main PLL clock
- "allwinner,sunxi-cpu-clk" - for the CPU multiplexer clock
- "allwinner,sunxi-axi-clk" - for the sunxi AXI clock
- "allwinner,sunxi-ahb-clk" - for the sunxi AHB clock
- "allwinner,sunxi-apb0-clk" - for the sunxi APB0 clock
- "allwinner,sunxi-apb1-clk" - for the sunxi APB1 clock
- "allwinner,sunxi-apb1-mux-clk" - for the sunxi APB1 clock muxing
+ "allwinner,sun4i-osc-clk" - for a gatable oscillator
+ "allwinner,sun4i-pll1-clk" - for the main PLL clock
+ "allwinner,sun4i-cpu-clk" - for the CPU multiplexer clock
+ "allwinner,sun4i-axi-clk" - for the AXI clock
+ "allwinner,sun4i-ahb-clk" - for the AHB clock
+ "allwinner,sun4i-apb0-clk" - for the APB0 clock
+ "allwinner,sun4i-apb1-clk" - for the APB1 clock
+ "allwinner,sun4i-apb1-mux-clk" - for the APB1 clock muxing
Required properties for all clocks:
- reg : shall be the control register address for the clock.
@@ -24,21 +24,21 @@ For example:
osc24M: osc24M@01c20050 {
#clock-cells = <0>;
- compatible = "allwinner,sunxi-osc-clk";
+ compatible = "allwinner,sun4i-osc-clk";
reg = <0x01c20050 0x4>;
clocks = <&osc24M_fixed>;
};
pll1: pll1@01c20000 {
#clock-cells = <0>;
- compatible = "allwinner,sunxi-pll1-clk";
+ compatible = "allwinner,sun4i-pll1-clk";
reg = <0x01c20000 0x4>;
clocks = <&osc24M>;
};
cpu: cpu@01c20054 {
#clock-cells = <0>;
- compatible = "allwinner,sunxi-cpu-clk";
+ compatible = "allwinner,sun4i-cpu-clk";
reg = <0x01c20054 0x4>;
clocks = <&osc32k>, <&osc24M>, <&pll1>;
};