diff options
Diffstat (limited to 'arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi')
-rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi | 50 |
1 files changed, 49 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi index bfc285c..ea56b80 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi @@ -359,6 +359,12 @@ status = "disabled"; }; + rcpm: rcpm@1ee2000 { + compatible = "fsl,ls1012a-rcpm", "fsl,qoriq-rcpm-2.1"; + reg = <0x0 0x1ee2000 0x0 0x1000>; + fsl,#rcpm-wakeup-cells = <1>; + }; + ftm0: ftm0@29d0000 { compatible = "fsl,ls1012a-ftm"; reg = <0x0 0x29d0000 0x0 0x10000>, @@ -527,7 +533,7 @@ interrupts = <0 126 IRQ_TYPE_LEVEL_HIGH>; }; - pcie@3400000 { + pcie: pcie@3400000 { compatible = "fsl,ls1012a-pcie", "snps,dw-pcie"; reg = <0x00 0x03400000 0x0 0x00100000 /* controller registers */ 0x40 0x00000000 0x0 0x00002000>; /* configuration space */ @@ -549,6 +555,48 @@ <0000 0 0 2 &gic 0 111 IRQ_TYPE_LEVEL_HIGH>, <0000 0 0 3 &gic 0 112 IRQ_TYPE_LEVEL_HIGH>, <0000 0 0 4 &gic 0 113 IRQ_TYPE_LEVEL_HIGH>; + status = "disabled"; + }; + }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + pfe_reserved: packetbuffer@83400000 { + reg = <0 0x83400000 0 0xc00000>; + }; + }; + + pfe: pfe@04000000 { + compatible = "fsl,pfe"; + reg = <0x0 0x04000000 0x0 0xc00000>, /* AXI 16M */ + <0x0 0x83400000 0x0 0xc00000>; /* PFE DDR 12M */ + reg-names = "pfe", "pfe-ddr"; + fsl,pfe-num-interfaces = <0x2>; + interrupts = <0 172 0x4>, /* HIF interrupt */ + <0 173 0x4>, /*HIF_NOCPY interrupt */ + <0 174 0x4>; /* WoL interrupt */ + interrupt-names = "pfe_hif", "pfe_hif_nocpy", "pfe_wol"; + memory-region = <&pfe_reserved>; + fsl,pfe-scfg = <&scfg 0>; + fsl,rcpm-wakeup = <&rcpm 0xf0000020>; + clocks = <&clockgen 4 0>; + clock-names = "pfe"; + + status = "okay"; + pfe_mac0: ethernet@0 { + }; + + pfe_mac1: ethernet@1 { + }; + }; + + firmware { + optee { + compatible = "linaro,optee-tz"; + method = "smc"; }; }; }; |