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Diffstat (limited to 'arch/arm64/boot/dts/freescale/fsl-ls2088a-rdb.dts')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-ls2088a-rdb.dts | 140 |
1 files changed, 140 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls2088a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-ls2088a-rdb.dts new file mode 100644 index 0000000..9300119 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/fsl-ls2088a-rdb.dts @@ -0,0 +1,140 @@ +/* + * Device Tree file for Freescale LS2088A RDB Board. + * + * Copyright 2016 Freescale Semiconductor, Inc. + * Copyright 2017 NXP + * + * Abhimanyu Saini <abhimanyu.saini@nxp.com> + * + * This file is dual-licensed: you can use it either under the terms + * of the GPLv2 or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; + +#include "fsl-ls2088a.dtsi" +#include "fsl-ls208xa-rdb.dtsi" + +/ { + model = "Freescale Layerscape 2088A RDB Board"; + compatible = "fsl,ls2088a-rdb", "fsl,ls2088a"; + + chosen { + stdout-path = "serial1:115200n8"; + }; +}; + +&emdio1 { + status = "disabled"; + /* CS4340 PHYs */ + mdio1_phy1: emdio1_phy@1 { + reg = <0x10>; + phy-connection-type = "xfi"; + }; + mdio1_phy2: emdio1_phy@2 { + reg = <0x11>; + phy-connection-type = "xfi"; + }; + mdio1_phy3: emdio1_phy@3 { + reg = <0x12>; + phy-connection-type = "xfi"; + }; + mdio1_phy4: emdio1_phy@4 { + reg = <0x13>; + phy-connection-type = "xfi"; + }; +}; + +&emdio2 { + /* AQR405 PHYs */ + mdio2_phy1: emdio2_phy@1 { + compatible = "ethernet-phy-ieee802.3-c45"; + interrupts = <0 1 0x4>; /* Level high type */ + reg = <0x0>; + phy-connection-type = "xfi"; + }; + mdio2_phy2: emdio2_phy@2 { + compatible = "ethernet-phy-ieee802.3-c45"; + interrupts = <0 2 0x4>; /* Level high type */ + reg = <0x1>; + phy-connection-type = "xfi"; + }; + mdio2_phy3: emdio2_phy@3 { + compatible = "ethernet-phy-ieee802.3-c45"; + interrupts = <0 4 0x4>; /* Level high type */ + reg = <0x2>; + phy-connection-type = "xfi"; + }; + mdio2_phy4: emdio2_phy@4 { + compatible = "ethernet-phy-ieee802.3-c45"; + interrupts = <0 5 0x4>; /* Level high type */ + reg = <0x3>; + phy-connection-type = "xfi"; + }; +}; + +/* Update DPMAC connections to external PHYs, under the assumption of + * SerDes 0x2a_0x41. This is currently the only SerDes supported on the board. + */ +/* Leave Cortina PHYs commented out until proper driver is integrated + *&dpmac1 { + * phy-handle = <&mdio1_phy1>; + *}; + *&dpmac2 { + * phy-handle = <&mdio1_phy2>; + *}; + *&dpmac3 { + * phy-handle = <&mdio1_phy3>; + *}; + *&dpmac4 { + * phy-handle = <&mdio1_phy4>; + *}; + */ + +&dpmac5 { + phy-handle = <&mdio2_phy1>; +}; +&dpmac6 { + phy-handle = <&mdio2_phy2>; +}; +&dpmac7 { + phy-handle = <&mdio2_phy3>; +}; +&dpmac8 { + phy-handle = <&mdio2_phy4>; +}; |