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-rw-r--r--arch/arm/boot/dts/hip04-d01.dts27
-rw-r--r--arch/arm/boot/dts/hip04.dtsi133
2 files changed, 0 insertions, 160 deletions
diff --git a/arch/arm/boot/dts/hip04-d01.dts b/arch/arm/boot/dts/hip04-d01.dts
index ba04dd5..40a9e33 100644
--- a/arch/arm/boot/dts/hip04-d01.dts
+++ b/arch/arm/boot/dts/hip04-d01.dts
@@ -28,32 +28,5 @@
uart0: uart@4007000 {
status = "ok";
};
-
- nand: nand@4020000 {
- nand-bus-width = <8>;
- nand-ecc-mode = "hw";
- nand-ecc-strength = <16>;
- nand-ecc-step-size = <1024>;
-
- partition@0 {
- label = "nand_text";
- reg = <0x00000000 0x00400000>;
- };
-
- partition@00400000 {
- label = "nand_monitor";
- reg = <0x00400000 0x00400000>;
- };
-
- partition@00800000 {
- label = "nand_kernel";
- reg = <0x00800000 0x00800000>;
- };
-
- partition@01000000 {
- label = "nand_fs";
- reg = <0x01000000 0x1f000000>;
- };
- };
};
};
diff --git a/arch/arm/boot/dts/hip04.dtsi b/arch/arm/boot/dts/hip04.dtsi
index 6434b7f..44044f2 100644
--- a/arch/arm/boot/dts/hip04.dtsi
+++ b/arch/arm/boot/dts/hip04.dtsi
@@ -269,139 +269,6 @@
interrupts = <0 372 4>;
};
- gpio@4003000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "snps,dw-apb-gpio";
- reg = <0x4003000 0x1000>;
-
- gpio3: gpio-controller@0 {
- compatible = "snps,dw-apb-gpio-port";
- gpio-controller;
- #gpio-cells = <2>;
- snps,nr-gpios = <32>;
- reg = <0>;
- interrupt-parent = <&gic>;
- interrupt-controller;
- #interrupt-cells = <2>;
- interrupts = <0 392 4>;
- };
- };
-
- gpio@4002000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "snps,dw-apb-gpio";
- reg = <0x4002000 0x1000>;
-
- gpio2: gpio-controller@0 {
- compatible = "snps,dw-apb-gpio-port";
- gpio-controller;
- #gpio-cells = <2>;
- snps,nr-gpios = <32>;
- reg = <0>;
- interrupt-parent = <&gic>;
- interrupt-controller;
- #interrupt-cells = <2>;
- interrupts = <0 391 4>;
- };
- };
-
- gpio@4001000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "snps,dw-apb-gpio";
- reg = <0x4001000 0x1000>;
-
- gpio1: gpio-controller@0 {
- compatible = "snps,dw-apb-gpio-port";
- gpio-controller;
- #gpio-cells = <2>;
- snps,nr-gpios = <32>;
- reg = <0>;
- interrupt-parent = <&gic>;
- interrupt-controller;
- #interrupt-cells = <2>;
- interrupts = <0 390 4>;
- };
- };
-
- gpio@4000000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "snps,dw-apb-gpio";
- reg = <0x4000000 0x1000>;
-
- gpio0: gpio-controller@0 {
- compatible = "snps,dw-apb-gpio-port";
- gpio-controller;
- #gpio-cells = <2>;
- snps,nr-gpios = <32>;
- reg = <0>;
- interrupt-parent = <&gic>;
- interrupt-controller;
- #interrupt-cells = <2>;
- interrupts = <0 389 4>;
- };
- };
-
- nand: nand@4020000 {
- compatible = "hisilicon,504-nfc";
- reg = <0x4020000 0x10000>, <0x5000000 0x1000>;
- interrupts = <0 379 4>;
- #address-cells = <1>;
- #size-cells = <1>;
- };
-
- mdio {
- compatible = "hisilicon,hip04-mdio";
- reg = <0x28f1000 0x1000>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- phy0: ethernet-phy@0 {
- compatible = "ethernet-phy-ieee802.3-c22";
- reg = <0>;
- marvell,reg-init = <18 0x14 0 0x8001>;
- };
-
- phy1: ethernet-phy@1 {
- compatible = "ethernet-phy-ieee802.3-c22";
- reg = <1>;
- marvell,reg-init = <18 0x14 0 0x8001>;
- };
- };
-
- ppe: ppe@28c0000 {
- compatible = "hisilicon,hip04-ppe", "syscon";
- reg = <0x28c0000 0x10000>;
- };
-
- fe: ethernet@28b0000 {
- compatible = "hisilicon,hip04-mac";
- reg = <0x28b0000 0x10000>;
- interrupts = <0 413 4>;
- phy-mode = "mii";
- port-handle = <&ppe 31 0>;
- };
-
- ge0: ethernet@2800000 {
- compatible = "hisilicon,hip04-mac";
- reg = <0x2800000 0x10000>;
- interrupts = <0 402 4>;
- phy-mode = "sgmii";
- port-handle = <&ppe 0 1>;
- phy-handle = <&phy0>;
- };
-
- ge8: ethernet@2880000 {
- compatible = "hisilicon,hip04-mac";
- reg = <0x2880000 0x10000>;
- interrupts = <0 410 4>;
- phy-mode = "sgmii";
- port-handle = <&ppe 8 2>;
- phy-handle = <&phy1>;
- };
};
etb@0,e3c42000 {